sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

366

CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

442

CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4536

CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4586

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4589

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4591

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4593

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2917

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2919

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2921

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2923

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2926

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2983

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2986

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2988

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2990

tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/radeon/cik.c

4642

RREG32(CP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/drm/radeon/cik.c

4647

WREG32(CP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/drm/radeon/cik.c

4728

RREG32(CP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/drm/radeon/cik.c

4739

WREG32(CP_HQD_PQ_DOORBELL_CONTROL,