readl
return readl(ptr + HPET_MAIN_COUNTER) + acpi_hpet_offset;
val = readl(ptr + HPET_CONFIG);
val = readl(ptr + HPET_CONFIG);
val = readl(ptr + HPET_CONFIG);
val = readl(ptr + HPET_PERIOD);
val = readl(ptr + HPET_CONFIG);
val = readl(ptr + HPET_CAPABILITIES);
val = readl(ptr + HPET_MAIN_COUNTER);
val2 = readl(ptr + HPET_MAIN_COUNTER);
val = readl(ptr + HPET_CONFIG);
val = readl(ptr + HPET_CONFIG);
ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));
ret = readl(((void __iomem *)adev->rmmio) + (mmMM_DATA * 4));
return readl(adev->doorbell.ptr + index);
u32 pd_entry = readl(ppgtt->pd_addr + pde);
readl(base + i915_mmio_reg_offset(reg))
#define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset))
return readl(rdev->doorbell.ptr + index);
ret = readl(((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
tmp = readl((void __iomem *)ptr);
tmp = readl((void __iomem *)ptr);
return readl(((void __iomem *)rdev->rmmio) + reg);
return readl((void *)((ULONG_PTR)base + offset));