sys/dev/drm/i915/i915_irq.c

1526

raw_reg_write(regs, GEN8_GT_IIR(0), gt_iir[0]);

sys/dev/drm/i915/i915_irq.c

1532

raw_reg_write(regs, GEN8_GT_IIR(1), gt_iir[1]);

sys/dev/drm/i915/i915_irq.c

1538

raw_reg_write(regs, GEN8_GT_IIR(2), gt_iir[2]);

sys/dev/drm/i915/i915_irq.c

1544

raw_reg_write(regs, GEN8_GT_IIR(3), gt_iir[3]);

sys/dev/drm/i915/i915_irq.c

289

raw_reg_write(regs, GEN11_GT_INTR_DW(bank), BIT(bit));

sys/dev/drm/i915/i915_irq.c

2978

raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit));

sys/dev/drm/i915/i915_irq.c

2996

raw_reg_write(regs, GEN11_INTR_IDENTITY_REG(bank),

sys/dev/drm/i915/i915_irq.c

3077

raw_reg_write(regs, GEN11_GT_INTR_DW(bank), intr_dw);

sys/dev/drm/i915/i915_irq.c

3107

raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);

sys/dev/drm/i915/i915_irq.c

3135

raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);

sys/dev/drm/i915/i915_irq.c

3156

raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl);