sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

392

struct pixel_clk_params *pix_clk_params,

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

472

struct pixel_clk_params *pix_clk_params)

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

534

struct pixel_clk_params *pix_clk_params)

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

562

struct pixel_clk_params *pix_clk_params,

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

595

struct pixel_clk_params *pix_clk_params,

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

838

struct pixel_clk_params *pix_clk_params,

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

897

struct pixel_clk_params *pix_clk_params,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

778

struct pixel_clk_params *pixel_clk_params)

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

786

pixel_clk_params->requested_pix_clk = stream->timing.pix_clk_khz;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

787

pixel_clk_params->encoder_object_id = stream->sink->link->link_enc->id;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

788

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

789

pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

791

pixel_clk_params->requested_sym_clk = LINK_RATE_LOW *

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

793

pixel_clk_params->flags.ENABLE_SS = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

794

pixel_clk_params->color_depth =

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

796

pixel_clk_params->flags.DISPLAY_BLANKED = 1;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

797

pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->timing.pixel_encoding ==

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

799

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

801

pixel_clk_params->color_depth = COLOR_DEPTH_888;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

804

pixel_clk_params->requested_pix_clk = pixel_clk_params->requested_pix_clk / 2;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

807

pixel_clk_params->requested_pix_clk *= 2;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1000

pixel_clk_params->requested_pix_clk /= 2;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1002

pixel_clk_params->requested_pix_clk *= 2;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

980

struct pixel_clk_params *pixel_clk_params)

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

983

pixel_clk_params->requested_pix_clk = stream->timing.pix_clk_khz;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

984

pixel_clk_params->encoder_object_id = stream->sink->link->link_enc->id;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

985

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

986

pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

988

pixel_clk_params->requested_sym_clk = LINK_RATE_LOW *

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

990

pixel_clk_params->flags.ENABLE_SS = 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

991

pixel_clk_params->color_depth =

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

993

pixel_clk_params->flags.DISPLAY_BLANKED = 1;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

994

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

997

pixel_clk_params->color_depth = COLOR_DEPTH_888;

sys/dev/drm/amd/display/dc/inc/clock_source.h

164

struct pixel_clk_params *, struct pll_settings *);

sys/dev/drm/amd/display/dc/inc/clock_source.h

167

struct pixel_clk_params *,

sys/dev/drm/amd/display/dc/inc/core_types.h

197

struct pixel_clk_params pix_clk_params;