sys/dev/drm/amd/amdgpu/amdgpu_device.c

670

u32 rbar_size = order_base_2(((space_needed >> 20) | 1)) - 1;

sys/dev/drm/amd/amdgpu/amdgpu_ih.c

47

rb_bufsz = order_base_2(ring_size / 4);

sys/dev/drm/amd/amdgpu/cik_ih.c

125

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/drm/amd/amdgpu/cik_sdma.c

458

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/amd/amdgpu/cz_ih.c

127

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2587

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2588

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2865

tmp |= order_base_2(GFX7_MEC_HPD_SIZE / 8);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2941

order_base_2(ring->ring_size / 8);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2943

(order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4348

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4530

(order_base_2(GFX8_MEC_HPD_SIZE / 4) - 1));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4559

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4561

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2682

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2909

(order_base_2(GFX9_MEC_HPD_SIZE / 4) - 1));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2956

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2958

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

sys/dev/drm/amd/amdgpu/iceland_ih.c

127

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

432

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

670

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

702

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/amd/amdgpu/tonga_ih.c

126

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

370

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

394

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

819

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1066

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

899

size = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1065

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

892

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/drm/amd/amdgpu/vega10_ih.c

111

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/drm/drm_bufs.c

1086

order = order_base_2(request->size);

sys/dev/drm/drm_bufs.c

1374

order = order_base_2(request->size);

sys/dev/drm/drm_bufs.c

246

map->size, order_base_2(map->size), map->handle);

sys/dev/drm/drm_bufs.c

711

order = order_base_2(request->size);

sys/dev/drm/drm_bufs.c

882

order = order_base_2(request->size);

sys/dev/drm/radeon/cik.c

4095

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/cik.c

4096

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/radeon/cik.c

4575

tmp |= order_base_2(MEC_HPD_SIZE / 8);

sys/dev/drm/radeon/cik.c

4689

order_base_2(rdev->ring[idx].ring_size / 8);

sys/dev/drm/radeon/cik.c

4691

(order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8);

sys/dev/drm/radeon/cik.c

6996

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

sys/dev/drm/radeon/cik_sdma.c

386

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/radeon/evergreen.c

3065

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/evergreen.c

3066

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/radeon/ni.c

1704

rb_cntl = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/ni.c

1705

rb_cntl |= order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8;

sys/dev/drm/radeon/ni_dma.c

208

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/radeon/r100.c

1145

rb_bufsz = order_base_2(ring_size / 8);

sys/dev/drm/radeon/r600.c

2739

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/r600.c

2740

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/radeon/r600.c

2795

rb_bufsz = order_base_2(ring_size / 8);

sys/dev/drm/radeon/r600.c

3485

rb_bufsz = order_base_2(ring_size / 4);

sys/dev/drm/radeon/r600.c

3722

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

sys/dev/drm/radeon/r600_dma.c

129

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/drm/radeon/si.c

3655

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/si.c

3656

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/radeon/si.c

3686

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/si.c

3687

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/radeon/si.c

3710

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/drm/radeon/si.c

3711

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/drm/radeon/si.c

5998

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

sys/dev/drm/radeon/uvd_v1_0.c

377

rb_bufsz = order_base_2(ring->ring_size);