sys/dev/raid/mpr/mpr.c

1002

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

1012

mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));

sys/dev/raid/mpr/mpr.c

1032

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

1039

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

1065

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

1079

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

1089

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

1115

mpr_regwrite(sc, MPI26_ATOMIC_REQUEST_DESCRIPTOR_POST_OFFSET,

sys/dev/raid/mpr/mpr.c

1121

mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,

sys/dev/raid/mpr/mpr.c

1123

mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,

sys/dev/raid/mpr/mpr.c

151

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

158

mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,

sys/dev/raid/mpr/mpr.c

186

mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg);

sys/dev/raid/mpr/mpr.c

228

mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

244

mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,

sys/dev/raid/mpr/mpr.c

2444

mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET,

sys/dev/raid/mpr/mpr.c

689

mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);

sys/dev/raid/mpr/mpr.c

690

mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);

sys/dev/raid/mpr/mpr.c

981

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);

sys/dev/raid/mpr/mpr.c

992

mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,

sys/dev/raid/mpr/mpr_user.c

2198

mpr_regwrite(sc, data->RegOffset, data->RegData);

sys/dev/raid/mpr/mprvar.h

517

mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);

sys/dev/raid/mpr/mprvar.h

737

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);

sys/dev/raid/mpr/mprvar.h

747

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);