Symbol: mpcc
sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
1947
struct mpcc *new_mpcc;
sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
886
struct mpcc *mpcc_to_remove = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
106
struct mpcc *mpc1_get_mpcc(struct mpc *mpc, int mpcc_id)
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
114
struct mpcc *mpc1_get_mpcc_for_dpp(struct mpc_tree *tree, int dpp_id)
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
116
struct mpcc *tmp_mpcc = tree->opp_list;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
176
struct mpcc *mpc1_insert_plane(
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
181
struct mpcc *insert_above_mpcc,
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
186
struct mpcc *new_mpcc = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
194
struct mpcc *temp_mpcc = tree->opp_list;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
226
struct mpcc *temp_mpcc = tree->opp_list;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
267
struct mpcc *mpcc_to_remove)
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
287
struct mpcc *temp_mpcc = tree->opp_list;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
327
static void mpc1_init_mpcc(struct mpcc *mpcc, int mpcc_inst)
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
329
mpcc->mpcc_id = mpcc_inst;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
330
mpcc->dpp_id = 0xf;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
331
mpcc->mpcc_bot = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
332
mpcc->blnd_cfg.overlap_only = false;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
333
mpcc->blnd_cfg.global_alpha = 0xff;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
334
mpcc->blnd_cfg.global_gain = 0xff;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
335
mpcc->sm_cfg.enable = false;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
376
struct mpcc *mpcc;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
392
mpcc = mpc1_get_mpcc(mpc, mpcc_id);
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
393
mpcc->dpp_id = top_sel;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
397
tree->opp_list = mpcc;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
403
struct mpcc *mpcc_bottom = mpc1_get_mpcc(mpc, bot_mpcc_id);
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
405
mpcc->mpcc_bot = mpcc_bottom;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
68
struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id);
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
78
mpcc->blnd_cfg = *blnd_cfg;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
135
struct mpcc *mpc1_insert_plane(
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
140
struct mpcc *insert_above_mpcc,
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
147
struct mpcc *mpcc);
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
178
struct mpcc *mpc1_get_mpcc(
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
182
struct mpcc *mpc1_get_mpcc_for_dpp(
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
105
struct mpcc mpcc_array[MAX_MPCC];
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
142
struct mpcc* (*insert_plane)(
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
147
struct mpcc *insert_above_mpcc,
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
164
struct mpcc *mpcc);
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
191
struct mpcc* (*get_mpcc_for_dpp)(
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
88
struct mpcc *mpcc_bot; /* pointer to bottom layer MPCC. NULL when not connected */
sys/dev/drm/amd/display/dc/inc/hw/mpc.h
98
struct mpcc *opp_list; /* The top MPCC layer of the MPC tree that outputs to OPP endpoint */
sys/dev/drm/amd/display/dc/inc/hw/opp.h
201
int mpcc[MAX_PIPES];