sys/dev/drm/amd/amdgpu/vce_v3_0.c

202

data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

207

WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

226

data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

231

WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

839

data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

844

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL), data);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

863

data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

868

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL), data);