sys/dev/drm/amd/amdgpu/vce_v2_0.c

157

tmp = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

160

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

173

WREG32_P(mmVCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

319

tmp = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

321

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

334

tmp = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

337

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

365

orig = tmp = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

369

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

188

data = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

191

WREG32(mmVCE_UENC_CLOCK_GATING, data);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

214

data = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

216

WREG32(mmVCE_UENC_CLOCK_GATING, data);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

535

WREG32_P(mmVCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

770

data = RREG32(mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

773

WREG32(mmVCE_UENC_CLOCK_GATING, data);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

607

WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), 0x1FF000, ~0xFF9FF000);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

825

data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

828

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), data);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

851

data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

853

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), data);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

916

data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

919

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING, data);