Symbol: mmUVD_VCPU_CACHE_OFFSET2
sys/dev/drm/amd/amdgpu/uvd_v4_2.c
569
WREG32(mmUVD_VCPU_CACHE_OFFSET2, addr);
sys/dev/drm/amd/amdgpu/uvd_v5_0.c
279
WREG32(mmUVD_VCPU_CACHE_OFFSET2, offset >> 3);
sys/dev/drm/amd/amdgpu/uvd_v6_0.c
611
WREG32(mmUVD_VCPU_CACHE_OFFSET2, offset >> 3);
sys/dev/drm/amd/amdgpu/uvd_v7_0.c
702
WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET2, (2 << 21));
sys/dev/drm/amd/amdgpu/uvd_v7_0.c
841
MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_VCPU_CACHE_OFFSET2), (2 << 21));
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
320
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET2, 0);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
394
WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_VCPU_CACHE_OFFSET2, 0, 0xFFFFFFFF, 0);