Symbol: mmUVD_VCPU_CACHE_OFFSET1
sys/dev/drm/amd/amdgpu/uvd_v4_2.c
563
WREG32(mmUVD_VCPU_CACHE_OFFSET1, addr);
sys/dev/drm/amd/amdgpu/uvd_v5_0.c
273
WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);
sys/dev/drm/amd/amdgpu/uvd_v6_0.c
605
WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);
sys/dev/drm/amd/amdgpu/uvd_v7_0.c
695
WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET1, (1 << 21));
sys/dev/drm/amd/amdgpu/uvd_v7_0.c
834
MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_VCPU_CACHE_OFFSET1), (1 << 21));
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
312
WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
382
WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0,