sys/dev/drm/amd/amdgpu/uvd_v5_0.c

615

data1 = RREG32(mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

653

WREG32(mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

710

data1 = RREG32(mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

741

WREG32(mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1260

data1 = RREG32(mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1307

WREG32(mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1365

data1 = RREG32(mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1398

WREG32(mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

628

data1 = RREG32(mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

696

WREG32(mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1592

data1 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1639

WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1648

data1 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1681

WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

507

data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

532

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

669

WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_SUVD_CGC_GATE, 1, 0xFFFFFFFF, sram_sel);