sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

261

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

128

return RREG32(mmUVD_RB_WPTR2);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

160

WREG32(mmUVD_RB_WPTR2,

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

858

WREG32(mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1107

WREG32_SOC15(UVD, k, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

126

return RREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

165

WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1473

return RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1491

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

934

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));