sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

254

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

126

return RREG32(mmUVD_RB_WPTR);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

157

WREG32(mmUVD_RB_WPTR,

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

851

WREG32(mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1100

WREG32_SOC15(UVD, k, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

124

return RREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

162

WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1471

return RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1488

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

927

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));