Symbol: mmUVD_JRBC_RB_RPTR
sys/dev/drm/amd/amdgpu/amdgpu_vcn.c
318
WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, ring->wptr);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
1580
return RREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
1937
reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_RPTR);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
945
WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, 0);