Symbol: mmUVD_JRBC_RB_CNTL
sys/dev/drm/amd/amdgpu/amdgpu_vcn.c
311
WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL,
sys/dev/drm/amd/amdgpu/amdgpu_vcn.c
320
WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL,
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
1898
reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_CNTL);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
1910
reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_CNTL);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
1943
reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_CNTL);
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
941
WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_NO_FETCH_MASK |
sys/dev/drm/amd/amdgpu/vcn_v1_0.c
947
WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK);