sys/dev/drm/amd/amdgpu/uvd_v4_2.c

271

WREG32(mmUVD_CGC_GATE, 0);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

616

data3 = RREG32(mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

654

WREG32(mmUVD_CGC_GATE, data3);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

709

data = RREG32(mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

740

WREG32(mmUVD_CGC_GATE, data);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1261

data3 = RREG32(mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1308

WREG32(mmUVD_CGC_GATE, data3);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1364

data = RREG32(mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1397

WREG32(mmUVD_CGC_GATE, data);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

627

data = RREG32(mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

695

WREG32(mmUVD_CGC_GATE, data);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1638

WREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE, 0);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1647

data = RREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1680

WREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

460

data = RREG32_SOC15(VCN, 0, mmUVD_CGC_GATE);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

481

WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

666

WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_CGC_GATE, 0, 0xFFFFFFFF, sram_sel);