sys/dev/drm/amd/amdgpu/uvd_v4_2.c

595

orig = data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

598

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

604

orig = data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

607

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

618

tmp = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

634

WREG32(mmUVD_CGC_CTRL, tmp);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

661

data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

700

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

755

orig = data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

758

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

764

orig = data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

767

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

832

data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1315

data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1355

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1412

orig = data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1415

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1421

orig = data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1424

WREG32(mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1494

data = RREG32(mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1591

data = RREG32_SOC15(UVD, ring->me, mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1637

WREG32_SOC15(UVD, ring->me, mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

849

MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_CGC_CTRL),

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

962

WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_CGC_CTRL), 0,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

450

data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

458

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

483

data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

504

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

575

data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

582

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

584

data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

605

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

663

WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_CGC_CTRL, reg_data, 0xFFFFFFFF, sram_sel);