sys/dev/drm/amd/amdgpu/cik_ih.c

379

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/cik_ih.c

395

tmp = RREG32(mmSRBM_STATUS) & SRBM_STATUS__IH_BUSY_MASK;

sys/dev/drm/amd/amdgpu/cik_ih.c

408

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/cz_ih.c

358

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/cz_ih.c

374

tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/cz_ih.c

386

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4724

tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5044

tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1168

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1185

tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1202

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1302

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1319

tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1337

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/iceland_ih.c

358

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/iceland_ih.c

374

tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/iceland_ih.c

386

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/tonga_ih.c

381

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/tonga_ih.c

397

tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/tonga_ih.c

409

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

642

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

651

if (!(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK))

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

565

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

574

if (!(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK))

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1125

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1145

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1444

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1464

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/drm/amd/amdgpu/vi.c

478

{mmSRBM_STATUS},