sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

434

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

481

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

501

for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

554

sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

679

temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

681

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

693

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

694

RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) |

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

378

mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

385

mmSDMA0_RLC0_RB_CNTL);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

547

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

598

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

617

for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

667

sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

738

temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

740

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

752

WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

753

RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) |

sys/dev/drm/amd/amdgpu/cikd.h

565

#define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)