sys/dev/drm/amd/amdgpu/cik_sdma.c

1093

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET);

sys/dev/drm/amd/amdgpu/cik_sdma.c

1095

WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/amd/amdgpu/cik_sdma.c

1100

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET);

sys/dev/drm/amd/amdgpu/cik_sdma.c

1102

WREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET, tmp);

sys/dev/drm/amd/amdgpu/cik_sdma.c

411

me_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]);

sys/dev/drm/amd/amdgpu/cik_sdma.c

416

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], me_cntl);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

387

f32_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

392

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], f32_cntl);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

985

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

987

WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

992

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

994

WREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET, tmp);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

622

f32_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

627

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], f32_cntl);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

669

f32_cntl = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

671

WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

767

temp = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

769

WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);