mmMC_SEQ_WR_CTL_D1
case mmMC_SEQ_WR_CTL_D1:
case mmMC_SEQ_WR_CTL_D1:
WREG32(mmMC_SEQ_WR_CTL_D1_LP, RREG32(mmMC_SEQ_WR_CTL_D1));
case mmMC_SEQ_WR_CTL_D1:
cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));
cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));
case mmMC_SEQ_WR_CTL_D1:
cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));
case mmMC_SEQ_WR_CTL_D1:
cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));