sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1153

cgs_write_register(hwmgr->device, mmGC_EDC_CTRL, data);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

746

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_EN_MASK, GC_EDC_CTRL__EDC_EN__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

747

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0001 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

748

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

749

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_FORCE_STALL_MASK, GC_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

750

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, GC_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

751

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, GC_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

762

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_EN_MASK, GC_EDC_CTRL__EDC_EN__SHIFT, 0x0001 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

763

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

764

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

765

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_FORCE_STALL_MASK, GC_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

766

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, GC_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0000 },

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

767

{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, GC_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 },