sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2597

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2635

return RREG32(mmCP_RB0_WPTR);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2642

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2643

(void)RREG32(mmCP_RB0_WPTR);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4361

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6074

return RREG32(mmCP_RB0_WPTR);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6086

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6087

(void)RREG32(mmCP_RB0_WPTR);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2692

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4026

wptr = RREG32_SOC15(GC, 0, mmCP_RB0_WPTR);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4042

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));