sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2674

WREG32(mmCP_MEC_CNTL, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2676

WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4740

WREG32(mmCP_MEC_CNTL, CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4395

WREG32(mmCP_MEC_CNTL, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4397

WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2742

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2744

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL,

sys/dev/drm/amd/powerplay/inc/polaris10_pwrvirus.h

1502

{ 0x00000000, mmCP_MEC_CNTL },

sys/dev/drm/amd/powerplay/inc/polaris10_pwrvirus.h

1503

{ 0x00000000, mmCP_MEC_CNTL },

sys/dev/drm/amd/powerplay/inc/polaris10_pwrvirus.h

52

{ 0x50000000, mmCP_MEC_CNTL },

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

214

cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

109

cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

197

mmCP_MEC_CNTL);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

200

cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, tmp);