bin/sh/miscbltin.c
447
static const struct limits limits[] = {
bin/sh/miscbltin.c
500
const struct limits *l)
bin/sh/miscbltin.c
522
const struct limits *l;
bin/sh/miscbltin.c
543
for (l = limits; l->name && l->option != what; l++)
bin/sh/miscbltin.c
576
for (l = limits; l->name; l++) {
crypto/openssh/sftp-client.c
566
struct sftp_limits limits;
crypto/openssh/sftp-client.c
567
if (sftp_get_limits(ret, &limits) != 0)
crypto/openssh/sftp-client.c
572
ret->download_buflen = MINIMUM(limits.read_length,
crypto/openssh/sftp-client.c
574
ret->upload_buflen = MINIMUM(limits.write_length,
crypto/openssh/sftp-client.c
580
(unsigned long long)limits.write_length,
crypto/openssh/sftp-client.c
581
(unsigned long long)limits.read_length,
crypto/openssh/sftp-client.c
586
if (num_requests == 0 && limits.open_handles) {
crypto/openssh/sftp-client.c
588
MINIMUM(DEFAULT_NUM_REQUESTS, limits.open_handles);
crypto/openssh/sftp-client.c
592
(unsigned long long)limits.open_handles,
crypto/openssh/sftp-client.c
621
sftp_get_limits(struct sftp_conn *conn, struct sftp_limits *limits)
crypto/openssh/sftp-client.c
662
memset(limits, 0, sizeof(*limits));
crypto/openssh/sftp-client.c
663
if ((r = sshbuf_get_u64(msg, &limits->packet_length)) != 0 ||
crypto/openssh/sftp-client.c
664
(r = sshbuf_get_u64(msg, &limits->read_length)) != 0 ||
crypto/openssh/sftp-client.c
665
(r = sshbuf_get_u64(msg, &limits->write_length)) != 0 ||
crypto/openssh/sftp-client.c
666
(r = sshbuf_get_u64(msg, &limits->open_handles)) != 0)
lib/libc/gen/vis.c
84
#include <limits.h>
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
540
ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits =
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
550
1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)));
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
554
u32 size = limits->numEntries *
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
563
limits->numEntries;
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
564
entry = &limits->entries[0];
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
566
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
603
ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits =
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
609
u32 size = limits->numEntries *
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
618
limits->numEntries;
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
619
entry = &limits->entries[0];
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
620
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
636
ATOM_PPLIB_SAMClk_Voltage_Limit_Table *limits =
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
641
u32 size = limits->numEntries *
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
650
limits->numEntries;
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
651
entry = &limits->entries[0];
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
652
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
694
ATOM_PPLIB_ACPClk_Voltage_Limit_Table *limits =
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
699
u32 size = limits->numEntries *
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
708
limits->numEntries;
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
709
entry = &limits->entries[0];
sys/dev/drm/amd/amdgpu/amdgpu_dpm.c
710
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/amd/amdgpu/ci_dpm.c
2519
const struct amdgpu_phase_shedding_limits_table *limits,
sys/dev/drm/amd/amdgpu/ci_dpm.c
2527
for (i = 0; i < limits->count; i++) {
sys/dev/drm/amd/amdgpu/ci_dpm.c
2528
if (sclk < limits->entries[i].sclk) {
sys/dev/drm/amd/amdgpu/ci_dpm.c
2536
const struct amdgpu_phase_shedding_limits_table *limits,
sys/dev/drm/amd/amdgpu/ci_dpm.c
2544
for (i = 0; i < limits->count; i++) {
sys/dev/drm/amd/amdgpu/ci_dpm.c
2545
if (mclk < limits->entries[i].mclk) {
sys/dev/drm/amd/amdgpu/si_dpm.c
4356
const struct amdgpu_phase_shedding_limits_table *limits)
sys/dev/drm/amd/amdgpu/si_dpm.c
4360
if ((table == NULL) || (limits == NULL))
sys/dev/drm/amd/amdgpu/si_dpm.c
4375
if (limits->count != (num_levels - 1))
sys/dev/drm/amd/amdgpu/si_dpm.c
4671
const struct amdgpu_phase_shedding_limits_table *limits,
sys/dev/drm/amd/amdgpu/si_dpm.c
4677
for (i = 0; i < limits->count; i++) {
sys/dev/drm/amd/amdgpu/si_dpm.c
4678
if ((voltage <= limits->entries[i].voltage) &&
sys/dev/drm/amd/amdgpu/si_dpm.c
4679
(sclk <= limits->entries[i].sclk) &&
sys/dev/drm/amd/amdgpu/si_dpm.c
4680
(mclk <= limits->entries[i].mclk))
sys/dev/drm/amd/include/pptable.h
667
ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits;
sys/dev/drm/amd/include/pptable.h
685
ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits;
sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
351
struct phm_clock_and_voltage_limits *limits,
sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
358
limits->sclk = le32_to_cpu(limitable->entries[0].ulSCLKLimit);
sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
359
limits->mclk = le32_to_cpu(limitable->entries[0].ulMCLKLimit);
sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
360
limits->vddc = le16_to_cpu(limitable->entries[0].usVddcLimit);
sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
361
limits->vddci = le16_to_cpu(limitable->entries[0].usVddciLimit);
sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
362
limits->vddgfx = le16_to_cpu(limitable->entries[0].usVddgfxLimit);
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
429
struct phm_clock_and_voltage_limits *limits,
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
432
limits->sclk = ((unsigned long)table->entries[0].ucSclkHigh << 16) |
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
434
limits->mclk = ((unsigned long)table->entries[0].ucMclkHigh << 16) |
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
436
limits->vddc = (unsigned long)le16_to_cpu(table->entries[0].usVddc);
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
437
limits->vddci = (unsigned long)le16_to_cpu(table->entries[0].usVddci);
sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
1483
const struct phm_clock_and_voltage_limits *limits =
sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
1486
info->engine_max_clock = limits->sclk;
sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
1487
info->memory_max_clock = limits->mclk;
sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
1490
if (limits->vddc >= table->entries[i].v) {
sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
1641
const struct phm_clock_and_voltage_limits *limits =
sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
1654
clocks->memory_max_clock = limits->mclk;
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
807
struct phm_clock_and_voltage_limits *limits,
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
814
limits->sclk = le32_to_cpu(limit_table->entries[0].ulSOCCLKLimit);
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
815
limits->mclk = le32_to_cpu(limit_table->entries[0].ulMCLKLimit);
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
816
limits->gfxclk = le32_to_cpu(limit_table->entries[0].ulGFXCLKLimit);
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
817
limits->vddc = le16_to_cpu(limit_table->entries[0].usVddcLimit);
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
818
limits->vddci = le16_to_cpu(limit_table->entries[0].usVddciLimit);
sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c
819
limits->vddmem = le16_to_cpu(limit_table->entries[0].usVddMemLimit);
sys/dev/drm/i915/intel_dp.c
1890
struct link_config_limits *limits)
sys/dev/drm/i915/intel_dp.c
1896
limits->min_bpp = limits->max_bpp = bpp;
sys/dev/drm/i915/intel_dp.c
1915
limits->min_clock = limits->max_clock = index;
sys/dev/drm/i915/intel_dp.c
1916
limits->min_lane_count = limits->max_lane_count =
sys/dev/drm/i915/intel_dp.c
1926
const struct link_config_limits *limits)
sys/dev/drm/i915/intel_dp.c
1932
for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
sys/dev/drm/i915/intel_dp.c
1936
for (clock = limits->min_clock; clock <= limits->max_clock; clock++) {
sys/dev/drm/i915/intel_dp.c
1937
for (lane_count = limits->min_lane_count;
sys/dev/drm/i915/intel_dp.c
1938
lane_count <= limits->max_lane_count;
sys/dev/drm/i915/intel_dp.c
1964
struct link_config_limits limits;
sys/dev/drm/i915/intel_dp.c
1973
limits.min_clock = 0;
sys/dev/drm/i915/intel_dp.c
1974
limits.max_clock = common_len - 1;
sys/dev/drm/i915/intel_dp.c
1976
limits.min_lane_count = 1;
sys/dev/drm/i915/intel_dp.c
1977
limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
sys/dev/drm/i915/intel_dp.c
1979
limits.min_bpp = 6 * 3;
sys/dev/drm/i915/intel_dp.c
1980
limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
sys/dev/drm/i915/intel_dp.c
1990
limits.min_lane_count = limits.max_lane_count;
sys/dev/drm/i915/intel_dp.c
1991
limits.min_clock = limits.max_clock;
sys/dev/drm/i915/intel_dp.c
1994
intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
sys/dev/drm/i915/intel_dp.c
1998
limits.max_lane_count,
sys/dev/drm/i915/intel_dp.c
1999
intel_dp->common_rates[limits.max_clock],
sys/dev/drm/i915/intel_dp.c
2000
limits.max_bpp, adjusted_mode->crtc_clock);
sys/dev/drm/i915/intel_dp.c
2006
if (!intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits))
sys/dev/drm/i915/intel_pm.c
6319
u32 limits;
sys/dev/drm/i915/intel_pm.c
6328
limits = (rps->max_freq_softlimit) << 23;
sys/dev/drm/i915/intel_pm.c
6330
limits |= (rps->min_freq_softlimit) << 14;
sys/dev/drm/i915/intel_pm.c
6332
limits = rps->max_freq_softlimit << 24;
sys/dev/drm/i915/intel_pm.c
6334
limits |= rps->min_freq_softlimit << 16;
sys/dev/drm/i915/intel_pm.c
6337
return limits;
sys/dev/drm/radeon/ci_dpm.c
2414
const struct radeon_phase_shedding_limits_table *limits,
sys/dev/drm/radeon/ci_dpm.c
2422
for (i = 0; i < limits->count; i++) {
sys/dev/drm/radeon/ci_dpm.c
2423
if (sclk < limits->entries[i].sclk) {
sys/dev/drm/radeon/ci_dpm.c
2431
const struct radeon_phase_shedding_limits_table *limits,
sys/dev/drm/radeon/ci_dpm.c
2439
for (i = 0; i < limits->count; i++) {
sys/dev/drm/radeon/ci_dpm.c
2440
if (mclk < limits->entries[i].mclk) {
sys/dev/drm/radeon/pptable.h
626
ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits;
sys/dev/drm/radeon/pptable.h
644
ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits;
sys/dev/drm/radeon/r600_dpm.c
1078
ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits =
sys/dev/drm/radeon/r600_dpm.c
1088
1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)));
sys/dev/drm/radeon/r600_dpm.c
1092
u32 size = limits->numEntries *
sys/dev/drm/radeon/r600_dpm.c
1101
limits->numEntries;
sys/dev/drm/radeon/r600_dpm.c
1102
entry = &limits->entries[0];
sys/dev/drm/radeon/r600_dpm.c
1104
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/radeon/r600_dpm.c
1140
ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits =
sys/dev/drm/radeon/r600_dpm.c
1146
u32 size = limits->numEntries *
sys/dev/drm/radeon/r600_dpm.c
1155
limits->numEntries;
sys/dev/drm/radeon/r600_dpm.c
1156
entry = &limits->entries[0];
sys/dev/drm/radeon/r600_dpm.c
1157
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/radeon/r600_dpm.c
1173
ATOM_PPLIB_SAMClk_Voltage_Limit_Table *limits =
sys/dev/drm/radeon/r600_dpm.c
1178
u32 size = limits->numEntries *
sys/dev/drm/radeon/r600_dpm.c
1187
limits->numEntries;
sys/dev/drm/radeon/r600_dpm.c
1188
entry = &limits->entries[0];
sys/dev/drm/radeon/r600_dpm.c
1189
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/radeon/r600_dpm.c
1231
ATOM_PPLIB_ACPClk_Voltage_Limit_Table *limits =
sys/dev/drm/radeon/r600_dpm.c
1236
u32 size = limits->numEntries *
sys/dev/drm/radeon/r600_dpm.c
1245
limits->numEntries;
sys/dev/drm/radeon/r600_dpm.c
1246
entry = &limits->entries[0];
sys/dev/drm/radeon/r600_dpm.c
1247
for (i = 0; i < limits->numEntries; i++) {
sys/dev/drm/radeon/si_dpm.c
3897
const struct radeon_phase_shedding_limits_table *limits)
sys/dev/drm/radeon/si_dpm.c
3901
if ((table == NULL) || (limits == NULL))
sys/dev/drm/radeon/si_dpm.c
3916
if (limits->count != (num_levels - 1))
sys/dev/drm/radeon/si_dpm.c
4212
const struct radeon_phase_shedding_limits_table *limits,
sys/dev/drm/radeon/si_dpm.c
4218
for (i = 0; i < limits->count; i++) {
sys/dev/drm/radeon/si_dpm.c
4219
if ((voltage <= limits->entries[i].voltage) &&
sys/dev/drm/radeon/si_dpm.c
4220
(sclk <= limits->entries[i].sclk) &&
sys/dev/drm/radeon/si_dpm.c
4221
(mclk <= limits->entries[i].mclk))
sys/dev/netif/iwn/if_iwn.c
1007
sc->limits = &iwn6000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1033
sc->limits = &iwn6000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1053
sc->limits = &iwn1000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1078
sc->limits = &iwn2030_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1100
sc->limits = &iwn2030_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1122
sc->limits = &iwn2030_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1145
sc->limits = &iwn2030_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1161
sc->limits = &iwn5000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1229
sc->limits = &iwn5000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1237
sc->limits = &iwn5000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1253
sc->limits = &iwn5000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
1303
sc->limits = &iwn4965_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
5945
calib->ofdm_x1 = sc->limits->min_ofdm_x1;
sys/dev/netif/iwn/if_iwn.c
5946
calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
sys/dev/netif/iwn/if_iwn.c
5947
calib->ofdm_x4 = sc->limits->min_ofdm_x4;
sys/dev/netif/iwn/if_iwn.c
5948
calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
sys/dev/netif/iwn/if_iwn.c
5950
calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
sys/dev/netif/iwn/if_iwn.c
5951
calib->energy_cck = sc->limits->energy_cck;
sys/dev/netif/iwn/if_iwn.c
6158
const struct iwn_sensitivity_limits *limits = sc->limits;
sys/dev/netif/iwn/if_iwn.c
6182
inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
sys/dev/netif/iwn/if_iwn.c
6183
inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
sys/dev/netif/iwn/if_iwn.c
6184
inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
sys/dev/netif/iwn/if_iwn.c
6185
inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
sys/dev/netif/iwn/if_iwn.c
6191
dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
sys/dev/netif/iwn/if_iwn.c
6192
dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
sys/dev/netif/iwn/if_iwn.c
6193
dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
sys/dev/netif/iwn/if_iwn.c
6194
dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
sys/dev/netif/iwn/if_iwn.c
6247
inc(calib->cck_x4, 3, limits->max_cck_x4);
sys/dev/netif/iwn/if_iwn.c
6249
inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
sys/dev/netif/iwn/if_iwn.c
6261
inc(calib->energy_cck, 2, limits->min_energy_cck);
sys/dev/netif/iwn/if_iwn.c
6262
dec(calib->cck_x4, 3, limits->min_cck_x4);
sys/dev/netif/iwn/if_iwn.c
6263
dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
sys/dev/netif/iwn/if_iwn.c
6303
cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
sys/dev/netif/iwn/if_iwn.c
6311
cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
sys/dev/netif/iwn/if_iwn.c
805
sc->limits = &iwn4965_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
829
sc->limits = &iwn1000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
846
sc->limits = &iwn6000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
900
sc->limits = &iwn6000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
920
sc->limits = &iwn6235_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
945
sc->limits = &iwn6000_sensitivity_limits;
sys/dev/netif/iwn/if_iwn.c
968
sc->limits = &iwn6000_sensitivity_limits;
sys/dev/netif/iwn/if_iwnvar.h
265
*limits;
usr.bin/limits/limits.c
273
struct rlimit limits[RLIM_NLIMITS];
usr.bin/limits/limits.c
280
if (getrlimit(i, &limits[i]) < 0) {
usr.bin/limits/limits.c
281
limits[i].rlim_cur = -1;
usr.bin/limits/limits.c
282
limits[i].rlim_max = -1;
usr.bin/limits/limits.c
370
val = resources[rcswhich].func(lc, resources[rcswhich].cap, limits[rcswhich].rlim_cur, limits[rcswhich].rlim_cur);
usr.bin/limits/limits.c
371
limits[rcswhich].rlim_cur = resources[rcswhich].func(lc, str, val, val);
usr.bin/limits/limits.c
374
val = resources[rcswhich].func(lc, resources[rcswhich].cap, limits[rcswhich].rlim_max, limits[rcswhich].rlim_max);
usr.bin/limits/limits.c
375
limits[rcswhich].rlim_max = resources[rcswhich].func(lc, str, val, val);
usr.bin/limits/limits.c
392
if (limits[rcswhich].rlim_max != RLIM_INFINITY) {
usr.bin/limits/limits.c
393
if (limits[rcswhich].rlim_cur == RLIM_INFINITY) {
usr.bin/limits/limits.c
394
limits[rcswhich].rlim_max = RLIM_INFINITY;
usr.bin/limits/limits.c
396
} else if (limits[rcswhich].rlim_cur > limits[rcswhich].rlim_max) {
usr.bin/limits/limits.c
398
limits[rcswhich].rlim_max = limits[rcswhich].rlim_cur;
usr.bin/limits/limits.c
401
limits[rcswhich].rlim_cur = limits[rcswhich].rlim_max;
usr.bin/limits/limits.c
417
limits[rcswhich].rlim_max = set_limits[rcswhich];
usr.bin/limits/limits.c
419
limits[rcswhich].rlim_cur = set_limits[rcswhich];
usr.bin/limits/limits.c
445
if (setrlimit(rcswhich, &limits[rcswhich]) == -1)
usr.bin/limits/limits.c
471
if (shellparm[shelltype].both && limits[rcswhich].rlim_cur == limits[rcswhich].rlim_max) {
usr.bin/limits/limits.c
472
print_limit(limits[rcswhich].rlim_max,
usr.bin/limits/limits.c
480
print_limit(limits[rcswhich].rlim_max,
usr.bin/limits/limits.c
488
print_limit(limits[rcswhich].rlim_cur,
usr.sbin/sensorsd/sensorsd.c
209
TAILQ_INIT(&sdlim->limits);
usr.sbin/sensorsd/sensorsd.c
225
TAILQ_INSERT_TAIL(&sdlim->limits, limit, entries);
usr.sbin/sensorsd/sensorsd.c
238
while((limit = TAILQ_FIRST(&sdlim->limits)) != NULL) {
usr.sbin/sensorsd/sensorsd.c
239
TAILQ_REMOVE(&sdlim->limits, limit, entries);
usr.sbin/sensorsd/sensorsd.c
335
TAILQ_FOREACH(limit, &sdlim->limits, entries) {
usr.sbin/sensorsd/sensorsd.c
420
TAILQ_FOREACH(limit, &sdlim->limits, entries) {
usr.sbin/sensorsd/sensorsd.c
688
TAILQ_FOREACH(p, &sdlim->limits, entries) {
usr.sbin/sensorsd/sensorsd.c
74
TAILQ_HEAD(, limits_t) limits;