Symbol: le32_to_cpup
sys/dev/drm/amd/amdgpu/cik_sdma.c
563
WREG32(mmSDMA0_UCODE_DATA + sdma_offsets[i], le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
2453
WREG32(mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
2463
WREG32(mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
2473
WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
2715
WREG32(mmCP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
2737
WREG32(mmCP_MEC_ME2_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
3577
WREG32(mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2488
WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2579
WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2589
WREG32_SOC15(GC, 0, mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2599
WREG32_SOC15(GC, 0, mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2786
le32_to_cpup(fw_data + mec_hdr->jt_offset + i));
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
209
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
210
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
214
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
334
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
335
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
339
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
400
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
401
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
409
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));
sys/dev/drm/amd/amdgpu/sdma_v4_0.c
929
WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik.c
1907
WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));
sys/dev/drm/radeon/cik.c
1908
WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));
sys/dev/drm/radeon/cik.c
1926
WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));
sys/dev/drm/radeon/cik.c
3939
WREG32(CP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik.c
3948
WREG32(CP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik.c
3957
WREG32(CP_ME_RAM_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik.c
4295
WREG32(CP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik.c
4309
WREG32(CP_MEC_ME2_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik.c
5977
WREG32(RLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik_sdma.c
484
WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/cik_sdma.c
493
WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/si.c
1624
WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));
sys/dev/drm/radeon/si.c
1625
WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));
sys/dev/drm/radeon/si.c
1634
WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));
sys/dev/drm/radeon/si.c
3495
WREG32(CP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/si.c
3504
WREG32(CP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/si.c
3513
WREG32(CP_ME_RAM_DATA, le32_to_cpup(fw_data++));
sys/dev/drm/radeon/si.c
5887
WREG32(RLC_UCODE_DATA, le32_to_cpup(fw_data++));
sys/dev/netif/iwm/if_iwm.c
2127
return le32_to_cpup((const uint32_t *)(phy_sku + IWM_SKU_8000));
sys/dev/netif/iwm/if_iwm.c
2136
return le32_to_cpup((const uint32_t *)(nvm_sw +
sys/dev/netif/iwm/if_iwm.c
2147
return le32_to_cpup((const uint32_t *)(phy_sku + IWM_RADIO_CFG_8000));
sys/dev/netif/iwm/if_iwm.c
2158
n_hw_addr = le32_to_cpup((const uint32_t *)(nvm_sw + IWM_N_HW_ADDRS_8000));
sys/dev/netif/iwm/if_iwm.c
650
le32_to_cpup((const uint32_t *)tlv_data);
sys/dev/netif/iwm/if_iwm.c
697
capa->flags = le32_to_cpup((const uint32_t *)tlv_data);
sys/dev/netif/iwm/if_iwm.c
716
num_of_cpus = le32_to_cpup((const uint32_t *)tlv_data);
sys/dev/netif/iwm/if_iwm.c
784
le32_to_cpup((const uint32_t *)tlv_data);
sys/dev/netif/iwm/if_iwm.c
835
paging_mem_size = le32_to_cpup((const uint32_t *)tlv_data);
sys/dev/netif/iwm/if_iwm.c
868
le32_to_cpup((const uint32_t *)tlv_data);
sys/dev/netif/iwm/if_iwmreg.h
5307
return le32_to_cpup((uint32_t *)&tx_resp->status +