sys/dev/drm/amd/display/dc/core/dc_link_dp.c

104

lane_count_set.bits.LANE_COUNT_SET =

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

107

lane_count_set.bits.ENHANCED_FRAMING = 1;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

109

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED =

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

113

link_set_buffer[1] = lane_count_set.raw;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

894

union lane_count_set lane_count_set = { {0} };

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

917

lane_count_set.bits.LANE_COUNT_SET = lt_settings->link_settings.lane_count;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

918

lane_count_set.bits.ENHANCED_FRAMING = 1;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

919

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

924

&lane_count_set.raw,

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

925

sizeof(lane_count_set));

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

98

union lane_count_set lane_count_set = { {0} };