jme_dev
device_printf(sc->jme_dev,
ctx = device_get_sysctl_ctx(sc->jme_dev);
tree = device_get_sysctl_tree(sc->jme_dev);
device_printf(sc->jme_dev,
device_printf(sc->jme_dev, "could not allocate Tx ring.\n");
device_printf(sc->jme_dev,
device_printf(sc->jme_dev,
device_printf(sc->jme_dev, "could not create Tx DMA tag.\n");
device_printf(sc->jme_dev,
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_100T2CR, 0);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_ANAR,
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR,
device_printf(sc->jme_dev, "establishing link failed, "
if (pci_find_extcap(sc->jme_dev, PCIY_PMG, &pmc) != 0) {
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
pmstat = pci_read_config(sc->jme_dev, pmc + PCIR_POWER_STATUS, 2);
pci_write_config(sc->jme_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
if (pci_find_extcap(sc->jme_dev, PCIY_PMG, &pmc) != 0) {
pmstat = pci_read_config(sc->jme_dev,
pci_write_config(sc->jme_dev,
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
device_printf(sc->jme_dev, "stopping transmitter timeout!\n");
device_printf(sc->jme_dev, "stopping receiver timeout!\n");
device_printf(sc->jme_dev, "phy read timeout: "
device_printf(sc->jme_dev, "phy write timeout: "
device_printf(rdata->jme_sc->jme_dev,
device_printf(rdata->jme_sc->jme_dev,
device_printf(rdata->jme_sc->jme_dev,
device_printf(rdata->jme_sc->jme_dev,
bmcr = jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, bmcr);
val = pci_read_config(sc->jme_dev, JME_PCI_PE1, 4);
pci_write_config(sc->jme_dev, JME_PCI_PE1, val, 4);
bmcr = jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, bmcr);
val = pci_read_config(sc->jme_dev, JME_PCI_PE1, 4);
pci_write_config(sc->jme_dev, JME_PCI_PE1, val, 4);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
return jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr,
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,
gtcr = jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr, MII_100T2CR);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_100T2CR, gtcr);
gtcr = jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr, MII_100T2CR);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_100T2CR, gtcr);
const struct jme_dev *sp;
device_printf(sc->jme_dev, "EEPROM idle timeout!\n");
device_printf(sc->jme_dev, "EEPROM read timeout!\n");
device_printf(sc->jme_dev,
sc->jme_dev = dev;
device_t jme_dev;