sys/dev/drm/amd/amdgpu/ci_dpm.c

1076

tmp = (RREG32_SMC(ixCG_FDO_CTRL2) & CG_FDO_CTRL2__FDO_PWM_MODE_MASK)

sys/dev/drm/amd/amdgpu/ci_dpm.c

1079

tmp = (RREG32_SMC(ixCG_FDO_CTRL2) & CG_FDO_CTRL2__TMIN_MASK)

sys/dev/drm/amd/amdgpu/ci_dpm.c

1085

tmp = RREG32_SMC(ixCG_FDO_CTRL2) & ~CG_FDO_CTRL2__TMIN_MASK;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1087

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1089

tmp = RREG32_SMC(ixCG_FDO_CTRL2) & ~CG_FDO_CTRL2__FDO_PWM_MODE_MASK;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1091

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1372

tmp = RREG32_SMC(ixCG_FDO_CTRL2) & ~CG_FDO_CTRL2__FDO_PWM_MODE_MASK;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1374

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1376

tmp = RREG32_SMC(ixCG_FDO_CTRL2) & ~CG_FDO_CTRL2__TMIN_MASK;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1378

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1402

tmp = RREG32_SMC(ixCG_FDO_CTRL2) & ~CG_FDO_CTRL2__TACH_PWM_RESP_RATE_MASK;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1404

WREG32_SMC(ixCG_FDO_CTRL2, tmp);