sys/dev/drm/amd/amdgpu/ci_dpm.c

2119

u32 tmp = RREG32_SMC(ixCG_DISPLAY_GAP_CNTL);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2131

WREG32_SMC(ixCG_DISPLAY_GAP_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2182

u32 tmp = RREG32_SMC(ixCG_DISPLAY_GAP_CNTL);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2189

WREG32_SMC(ixCG_DISPLAY_GAP_CNTL, tmp);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

387

ixCG_DISPLAY_GAP_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

396

ixCG_DISPLAY_GAP_CNTL, display_gap);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4042

uint32_t display_gap = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4049

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL, display_gap);