sys/dev/drm/i915/i915_drv.h

1784

struct intel_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];

sys/dev/drm/i915/i915_drv.h

1785

struct intel_crtc *pipe_to_crtc_mapping[I915_MAX_PIPES];

sys/dev/drm/i915/i915_drv.h

403

struct intel_crtc;

sys/dev/drm/i915/i915_drv.h

417

struct intel_crtc *intel_crtc,

sys/dev/drm/i915/i915_drv.h

426

void (*update_wm)(struct intel_crtc *crtc);

sys/dev/drm/i915/i915_drv.h

430

bool (*get_pipe_config)(struct intel_crtc *,

sys/dev/drm/i915/i915_drv.h

432

void (*get_initial_plane_config)(struct intel_crtc *,

sys/dev/drm/i915/i915_drv.h

434

int (*crtc_compute_clock)(struct intel_crtc *crtc,

sys/dev/drm/i915/i915_drv.h

447

void (*fdi_link_train)(struct intel_crtc *crtc,

sys/dev/drm/i915/i915_drv.h

506

struct intel_crtc *crtc;

sys/dev/drm/i915/i915_irq.c

1037

position = __intel_get_crtc_scanline(intel_crtc);

sys/dev/drm/i915/i915_irq.c

1104

int intel_get_crtc_scanline(struct intel_crtc *crtc)

sys/dev/drm/i915/i915_irq.c

1746

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/i915_irq.c

887

static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc)

sys/dev/drm/i915/i915_irq.c

931

static int __intel_get_crtc_scanline(struct intel_crtc *crtc)

sys/dev/drm/i915/i915_irq.c

996

struct intel_crtc *intel_crtc = intel_get_crtc_for_pipe(dev_priv,

sys/dev/drm/i915/intel_atomic.c

224

struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_atomic.c

252

if (num_scalers_need > intel_crtc->num_scalers){

sys/dev/drm/i915/intel_atomic.c

254

num_scalers_need, intel_crtc->num_scalers);

sys/dev/drm/i915/intel_atomic.c

270

idx = intel_crtc->base.base.id;

sys/dev/drm/i915/intel_atomic.c

307

if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {

sys/dev/drm/i915/intel_atomic.c

318

for (j = 0; j < intel_crtc->num_scalers; j++) {

sys/dev/drm/i915/intel_atomic.c

323

intel_crtc->pipe, *scaler_id, name, idx);

sys/dev/drm/i915/intel_atomic.c

347

} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {

sys/dev/drm/i915/intel_audio.c

321

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

369

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

421

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

453

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

504

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

550

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

639

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

698

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

853

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_cdclk.c

2224

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_cdclk.c

2259

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_cdclk.c

2350

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_color.c

111

static void ilk_load_ycbcr_conversion_matrix(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_color.c

113

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_color.c

114

struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);

sys/dev/drm/i915/intel_color.c

139

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_color.c

140

int i, pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_color.c

153

ilk_load_ycbcr_conversion_matrix(intel_crtc);

sys/dev/drm/i915/intel_color.c

319

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_color.c

320

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_color.c

367

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_color.c

383

I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);

sys/dev/drm/i915/intel_crt.c

155

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_crt.c

265

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_crt.c

282

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1065

struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1107

void hsw_fdi_link_train(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_ddi.c

1251

intel_ddi_get_crtc_encoder(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_ddi.c

1754

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1793

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1808

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1894

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

2125

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

2975

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

3366

struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_ddi.c

3432

intel_dp_get_m_n(intel_crtc, pipe_config);

sys/dev/drm/i915/intel_ddi.c

3438

intel_dp_get_m_n(intel_crtc, pipe_config);

sys/dev/drm/i915/intel_ddi.c

3595

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

10019

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

1018

bool intel_crtc_active(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

10211

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

10306

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_display.c

10379

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

1040

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_display.c

10401

crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);

sys/dev/drm/i915/intel_display.c

10440

intel_wait_for_vblank(dev_priv, intel_crtc->pipe);

sys/dev/drm/i915/intel_display.c

10499

static void i9xx_crtc_clock_get(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

10607

static void ironlake_pch_clock_get(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

10632

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

1064

static void wait_for_pipe_scanline_moving(struct intel_crtc *crtc, bool state)

sys/dev/drm/i915/intel_display.c

10669

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

10672

kfree(intel_crtc);

sys/dev/drm/i915/intel_display.c

10726

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

1075

static void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

10776

intel_crtc->base.base.id, intel_crtc->base.name,

sys/dev/drm/i915/intel_display.c

1080

static void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

10833

struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

10859

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

10872

ret = dev_priv->display.crtc_compute_clock(intel_crtc,

sys/dev/drm/i915/intel_display.c

1088

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

10910

intel_crtc,

sys/dev/drm/i915/intel_display.c

10926

ret = skl_check_pipe_max_pixel_rate(intel_crtc,

sys/dev/drm/i915/intel_display.c

10929

ret = intel_atomic_setup_scalers(dev_priv, intel_crtc,

sys/dev/drm/i915/intel_display.c

10997

compute_baseline_pipe_bpp(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

11098

static void intel_dump_pipe_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

11838

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

11839

const enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

12035

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

12049

active = dev_priv->display.get_pipe_config(intel_crtc, pipe_config);

sys/dev/drm/i915/intel_display.c

12059

I915_STATE_WARN(intel_crtc->active != new_crtc_state->active,

sys/dev/drm/i915/intel_display.c

12061

"(expected %i, found %i)\n", new_crtc_state->active, intel_crtc->active);

sys/dev/drm/i915/intel_display.c

12071

I915_STATE_WARN(active && intel_crtc->pipe != pipe,

sys/dev/drm/i915/intel_display.c

12090

intel_dump_pipe_config(intel_crtc, pipe_config,

sys/dev/drm/i915/intel_display.c

12092

intel_dump_pipe_config(intel_crtc, sw_config,

sys/dev/drm/i915/intel_display.c

12225

static void update_scanline_offset(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

12284

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

12296

intel_release_shared_dpll(old_dpll, intel_crtc, state);

sys/dev/drm/i915/intel_display.c

12309

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_display.c

12318

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

12328

first_pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

12337

for_each_intel_crtc(state->dev, intel_crtc) {

sys/dev/drm/i915/intel_display.c

12340

pipe_config = intel_atomic_get_crtc_state(state, intel_crtc);

sys/dev/drm/i915/intel_display.c

12354

enabled_pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

12594

u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

12611

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

12619

update_scanline_offset(intel_crtc);

sys/dev/drm/i915/intel_display.c

12623

intel_crtc_enable_pipe_crc(intel_crtc);

sys/dev/drm/i915/intel_display.c

12630

intel_fbc_enable(intel_crtc, pipe_config, new_plane_state);

sys/dev/drm/i915/intel_display.c

12655

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_display.c

12689

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

12691

pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

12806

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

12829

intel_crtc_disable_pipe_crc(intel_crtc);

sys/dev/drm/i915/intel_display.c

12832

intel_crtc->active = false;

sys/dev/drm/i915/intel_display.c

12833

intel_fbc_disable(intel_crtc);

sys/dev/drm/i915/intel_display.c

12834

intel_disable_shared_dpll(intel_crtc);

sys/dev/drm/i915/intel_display.c

1301

static void assert_planes_disabled(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

13042

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

13370

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

13406

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

13412

intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc);

sys/dev/drm/i915/intel_display.c

13431

skl_detach_scalers(intel_crtc);

sys/dev/drm/i915/intel_display.c

13439

void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

13458

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

13462

intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc);

sys/dev/drm/i915/intel_display.c

13469

intel_crtc_arm_fifo_underrun(intel_crtc, new_crtc_state);

sys/dev/drm/i915/intel_display.c

136

static void i9xx_crtc_clock_get(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

138

static void ironlake_pch_clock_get(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

1389

static void _vlv_enable_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

14047

static void intel_crtc_init_scalers(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

1407

static void vlv_enable_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

14071

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_display.c

14077

intel_crtc = kzalloc(sizeof(*intel_crtc), GFP_KERNEL);

sys/dev/drm/i915/intel_display.c

14078

if (!intel_crtc)

sys/dev/drm/i915/intel_display.c

14086

intel_crtc->config = crtc_state;

sys/dev/drm/i915/intel_display.c

14087

intel_crtc->base.state = &crtc_state->base;

sys/dev/drm/i915/intel_display.c

14088

crtc_state->base.crtc = &intel_crtc->base;

sys/dev/drm/i915/intel_display.c

14095

intel_crtc->plane_ids_mask |= BIT(primary->id);

sys/dev/drm/i915/intel_display.c

14105

intel_crtc->plane_ids_mask |= BIT(plane->id);

sys/dev/drm/i915/intel_display.c

14113

intel_crtc->plane_ids_mask |= BIT(cursor->id);

sys/dev/drm/i915/intel_display.c

14115

ret = drm_crtc_init_with_planes(&dev_priv->drm, &intel_crtc->base,

sys/dev/drm/i915/intel_display.c

14122

intel_crtc->pipe = pipe;

sys/dev/drm/i915/intel_display.c

14125

intel_crtc_init_scalers(intel_crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

14129

dev_priv->pipe_to_crtc_mapping[pipe] = intel_crtc;

sys/dev/drm/i915/intel_display.c

14136

dev_priv->plane_to_crtc_mapping[i9xx_plane] = intel_crtc;

sys/dev/drm/i915/intel_display.c

14139

drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);

sys/dev/drm/i915/intel_display.c

14141

intel_color_init(&intel_crtc->base);

sys/dev/drm/i915/intel_display.c

14143

WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe);

sys/dev/drm/i915/intel_display.c

14153

kfree(intel_crtc);

sys/dev/drm/i915/intel_display.c

14175

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

1426

static void _chv_enable_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

144

static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc);

sys/dev/drm/i915/intel_display.c

145

static void intel_set_pipe_timings(struct intel_crtc *intel_crtc);

sys/dev/drm/i915/intel_display.c

14530

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

1458

static void chv_enable_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

146

static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc);

sys/dev/drm/i915/intel_display.c

147

static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

1497

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

1508

static void i9xx_enable_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

153

static void vlv_prepare_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

15337

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

15480

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_display.c

155

static void chv_prepare_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

15550

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_display.c

15573

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

15581

struct intel_crtc *plane_crtc;

sys/dev/drm/i915/intel_display.c

15598

static bool intel_crtc_has_encoders(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

15627

static void intel_sanitize_crtc(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

1568

static void i9xx_disable_pll(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

15713

struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);

sys/dev/drm/i915/intel_display.c

15804

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

15833

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

159

static void intel_crtc_init_scalers(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

16034

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

161

static void skylake_pfit_enable(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_display.c

162

static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);

sys/dev/drm/i915/intel_display.c

163

static void ironlake_pfit_enable(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_display.c

1672

struct intel_crtc *intel_crtc = intel_get_crtc_for_pipe(dev_priv,

sys/dev/drm/i915/intel_display.c

1678

assert_shared_dpll_enabled(dev_priv, intel_crtc->config->shared_dpll);

sys/dev/drm/i915/intel_display.c

1704

if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_HDMI))

sys/dev/drm/i915/intel_display.c

1713

intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))

sys/dev/drm/i915/intel_display.c

1810

enum i915_pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

1822

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

1878

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

2702

intel_alloc_initial_plane_obj(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

2814

static void intel_plane_disable_noatomic(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

2833

intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_display.c

2836

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

2840

struct drm_plane *primary = intel_crtc->base.primary;

sys/dev/drm/i915/intel_display.c

2850

if (intel_alloc_initial_plane_obj(intel_crtc, plane_config)) {

sys/dev/drm/i915/intel_display.c

2864

if (c == &intel_crtc->base)

sys/dev/drm/i915/intel_display.c

2888

intel_plane_disable_noatomic(intel_crtc, intel_plane);

sys/dev/drm/i915/intel_display.c

2908

intel_crtc->pipe, PTR_ERR(intel_state->vma));

sys/dev/drm/i915/intel_display.c

2935

plane_state->crtc = &intel_crtc->base;

sys/dev/drm/i915/intel_display.c

3257

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

3458

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

3518

static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id)

sys/dev/drm/i915/intel_display.c

3520

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

3523

I915_WRITE(SKL_PS_CTRL(intel_crtc->pipe, id), 0);

sys/dev/drm/i915/intel_display.c

3524

I915_WRITE(SKL_PS_WIN_POS(intel_crtc->pipe, id), 0);

sys/dev/drm/i915/intel_display.c

3525

I915_WRITE(SKL_PS_WIN_SZ(intel_crtc->pipe, id), 0);

sys/dev/drm/i915/intel_display.c

3531

static void skl_detach_scalers(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

3536

scaler_state = &intel_crtc->config->scaler_state;

sys/dev/drm/i915/intel_display.c

3539

for (i = 0; i < intel_crtc->num_scalers; i++) {

sys/dev/drm/i915/intel_display.c

3541

skl_detach_scaler(intel_crtc, i);

sys/dev/drm/i915/intel_display.c

3915

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

3948

static void intel_fdi_normal_train(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

3990

static void ironlake_fdi_link_train(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

4091

static void gen6_fdi_link_train(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

4224

static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

4343

static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

4345

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

4347

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

4355

temp |= FDI_DP_PORT_WIDTH(intel_crtc->config->fdi_lanes);

sys/dev/drm/i915/intel_display.c

4380

static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

4382

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

4384

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

4414

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

4415

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

4504

static void lpt_program_iclkip(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

4618

static void ironlake_pch_transcoder_set_timings(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

4663

static void ivybridge_update_fdi_bc_bifurcation(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

4665

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

4667

switch (intel_crtc->pipe) {

sys/dev/drm/i915/intel_display.c

4671

if (intel_crtc->config->fdi_lanes > 2)

sys/dev/drm/i915/intel_display.c

4694

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4726

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4810

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4912

struct intel_crtc *intel_crtc =

sys/dev/drm/i915/intel_display.c

4914

struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);

sys/dev/drm/i915/intel_display.c

4962

intel_crtc->pipe, scaler_user, *scaler_id,

sys/dev/drm/i915/intel_display.c

4986

intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h);

sys/dev/drm/i915/intel_display.c

4994

intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h,

sys/dev/drm/i915/intel_display.c

5085

static void skylake_scaler_disable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

5093

static void skylake_pfit_enable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

5130

static void ironlake_pfit_enable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

5153

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

5193

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

5222

static void intel_crtc_dpms_overlay_disable(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

5224

if (intel_crtc->overlay) {

sys/dev/drm/i915/intel_display.c

5225

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

5228

(void) intel_overlay_switch_off(intel_crtc->overlay);

sys/dev/drm/i915/intel_display.c

5254

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5255

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

5278

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5279

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

5354

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

5396

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

5486

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5488

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

5490

intel_crtc_dpms_overlay_disable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5493

to_intel_plane(p)->disable_plane(to_intel_plane(p), intel_crtc);

sys/dev/drm/i915/intel_display.c

5629

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5630

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

5634

if (WARN_ON(intel_crtc->active))

sys/dev/drm/i915/intel_display.c

5650

if (intel_crtc->config->has_pch_encoder)

sys/dev/drm/i915/intel_display.c

5651

intel_prepare_shared_dpll(intel_crtc);

sys/dev/drm/i915/intel_display.c

5653

if (intel_crtc_has_dp_encoder(intel_crtc->config))

sys/dev/drm/i915/intel_display.c

5654

intel_dp_set_m_n(intel_crtc, M1_N1);

sys/dev/drm/i915/intel_display.c

5656

intel_set_pipe_timings(intel_crtc);

sys/dev/drm/i915/intel_display.c

5657

intel_set_pipe_src_size(intel_crtc);

sys/dev/drm/i915/intel_display.c

5659

if (intel_crtc->config->has_pch_encoder) {

sys/dev/drm/i915/intel_display.c

5660

intel_cpu_transcoder_set_m_n(intel_crtc,

sys/dev/drm/i915/intel_display.c

5661

&intel_crtc->config->fdi_m_n, NULL);

sys/dev/drm/i915/intel_display.c

5666

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

5670

if (intel_crtc->config->has_pch_encoder) {

sys/dev/drm/i915/intel_display.c

5674

ironlake_fdi_pll_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5680

ironlake_pfit_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5689

dev_priv->display.initial_watermarks(old_intel_state, intel_crtc->config);

sys/dev/drm/i915/intel_display.c

5692

if (intel_crtc->config->has_pch_encoder)

sys/dev/drm/i915/intel_display.c

5701

cpt_verify_modeset(dev, intel_crtc->pipe);

sys/dev/drm/i915/intel_display.c

5709

if (intel_crtc->config->has_pch_encoder) {

sys/dev/drm/i915/intel_display.c

5718

static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

5737

static void icl_pipe_mbus_enable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

5756

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5757

int pipe = intel_crtc->pipe, hsw_workaround_pipe;

sys/dev/drm/i915/intel_display.c

5758

enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

sys/dev/drm/i915/intel_display.c

5764

if (WARN_ON(intel_crtc->active))

sys/dev/drm/i915/intel_display.c

5769

if (intel_crtc->config->shared_dpll)

sys/dev/drm/i915/intel_display.c

5770

intel_enable_shared_dpll(intel_crtc);

sys/dev/drm/i915/intel_display.c

5777

if (intel_crtc_has_dp_encoder(intel_crtc->config))

sys/dev/drm/i915/intel_display.c

5778

intel_dp_set_m_n(intel_crtc, M1_N1);

sys/dev/drm/i915/intel_display.c

5781

intel_set_pipe_timings(intel_crtc);

sys/dev/drm/i915/intel_display.c

5783

intel_set_pipe_src_size(intel_crtc);

sys/dev/drm/i915/intel_display.c

5788

intel_crtc->config->pixel_multiplier - 1);

sys/dev/drm/i915/intel_display.c

5791

if (intel_crtc->config->has_pch_encoder) {

sys/dev/drm/i915/intel_display.c

5792

intel_cpu_transcoder_set_m_n(intel_crtc,

sys/dev/drm/i915/intel_display.c

5793

&intel_crtc->config->fdi_m_n, NULL);

sys/dev/drm/i915/intel_display.c

5803

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

5807

intel_crtc->config->pch_pfit.enabled;

sys/dev/drm/i915/intel_display.c

5812

skylake_pfit_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5814

ironlake_pfit_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5841

icl_pipe_mbus_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5847

if (intel_crtc->config->has_pch_encoder)

sys/dev/drm/i915/intel_display.c

5850

if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST))

sys/dev/drm/i915/intel_display.c

5872

static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force)

sys/dev/drm/i915/intel_display.c

5893

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5894

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

5911

ironlake_pfit_disable(intel_crtc, false);

sys/dev/drm/i915/intel_display.c

5913

if (intel_crtc->config->has_pch_encoder)

sys/dev/drm/i915/intel_display.c

5918

if (intel_crtc->config->has_pch_encoder) {

sys/dev/drm/i915/intel_display.c

5939

ironlake_fdi_pll_disable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5951

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

5970

skylake_scaler_disable(intel_crtc);

sys/dev/drm/i915/intel_display.c

5972

ironlake_pfit_disable(intel_crtc, false);

sys/dev/drm/i915/intel_display.c

5980

static void i9xx_pfit_enable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

6058

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

6059

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

6092

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

6096

old_domains = intel_crtc->enabled_power_domains;

sys/dev/drm/i915/intel_display.c

6097

intel_crtc->enabled_power_domains = new_domains =

sys/dev/drm/i915/intel_display.c

6125

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

6126

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

6128

if (WARN_ON(intel_crtc->active))

sys/dev/drm/i915/intel_display.c

6131

if (intel_crtc_has_dp_encoder(intel_crtc->config))

sys/dev/drm/i915/intel_display.c

6132

intel_dp_set_m_n(intel_crtc, M1_N1);

sys/dev/drm/i915/intel_display.c

6134

intel_set_pipe_timings(intel_crtc);

sys/dev/drm/i915/intel_display.c

6135

intel_set_pipe_src_size(intel_crtc);

sys/dev/drm/i915/intel_display.c

6144

i9xx_set_pipeconf(intel_crtc);

sys/dev/drm/i915/intel_display.c

6148

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

6155

chv_prepare_pll(intel_crtc, intel_crtc->config);

sys/dev/drm/i915/intel_display.c

6156

chv_enable_pll(intel_crtc, intel_crtc->config);

sys/dev/drm/i915/intel_display.c

6158

vlv_prepare_pll(intel_crtc, intel_crtc->config);

sys/dev/drm/i915/intel_display.c

6159

vlv_enable_pll(intel_crtc, intel_crtc->config);

sys/dev/drm/i915/intel_display.c

6164

i9xx_pfit_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

6178

static void i9xx_set_pll_dividers(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

6195

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

6196

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

6198

if (WARN_ON(intel_crtc->active))

sys/dev/drm/i915/intel_display.c

6201

i9xx_set_pll_dividers(intel_crtc);

sys/dev/drm/i915/intel_display.c

6203

if (intel_crtc_has_dp_encoder(intel_crtc->config))

sys/dev/drm/i915/intel_display.c

6204

intel_dp_set_m_n(intel_crtc, M1_N1);

sys/dev/drm/i915/intel_display.c

6206

intel_set_pipe_timings(intel_crtc);

sys/dev/drm/i915/intel_display.c

6207

intel_set_pipe_src_size(intel_crtc);

sys/dev/drm/i915/intel_display.c

6209

i9xx_set_pipeconf(intel_crtc);

sys/dev/drm/i915/intel_display.c

6211

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

6218

i9xx_enable_pll(intel_crtc, pipe_config);

sys/dev/drm/i915/intel_display.c

6220

i9xx_pfit_enable(intel_crtc);

sys/dev/drm/i915/intel_display.c

6226

intel_crtc->config);

sys/dev/drm/i915/intel_display.c

6228

intel_update_watermarks(intel_crtc);

sys/dev/drm/i915/intel_display.c

6237

static void i9xx_pfit_disable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

6258

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

6259

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

6275

i9xx_pfit_disable(intel_crtc);

sys/dev/drm/i915/intel_display.c

6279

if (!intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI)) {

sys/dev/drm/i915/intel_display.c

6285

i9xx_disable_pll(intel_crtc);

sys/dev/drm/i915/intel_display.c

6294

intel_update_watermarks(intel_crtc);

sys/dev/drm/i915/intel_display.c

6305

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

6314

if (!intel_crtc->active)

sys/dev/drm/i915/intel_display.c

6317

for_each_intel_plane_on_crtc(&dev_priv->drm, intel_crtc, plane) {

sys/dev/drm/i915/intel_display.c

6322

intel_plane_disable_noatomic(intel_crtc, plane);

sys/dev/drm/i915/intel_display.c

6335

crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);

sys/dev/drm/i915/intel_display.c

6349

intel_crtc->active = false;

sys/dev/drm/i915/intel_display.c

6357

intel_fbc_disable(intel_crtc);

sys/dev/drm/i915/intel_display.c

6358

intel_update_watermarks(intel_crtc);

sys/dev/drm/i915/intel_display.c

6359

intel_disable_shared_dpll(intel_crtc);

sys/dev/drm/i915/intel_display.c

6361

domains = intel_crtc->enabled_power_domains;

sys/dev/drm/i915/intel_display.c

6364

intel_crtc->enabled_power_domains = 0;

sys/dev/drm/i915/intel_display.c

6366

dev_priv->active_crtcs &= ~(1 << intel_crtc->pipe);

sys/dev/drm/i915/intel_display.c

6367

dev_priv->min_cdclk[intel_crtc->pipe] = 0;

sys/dev/drm/i915/intel_display.c

6368

dev_priv->min_voltage_level[intel_crtc->pipe] = 0;

sys/dev/drm/i915/intel_display.c

6510

struct intel_crtc *other_crtc;

sys/dev/drm/i915/intel_display.c

6578

static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_display.c

6581

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

6606

ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config);

sys/dev/drm/i915/intel_display.c

6625

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

6677

static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.c

6734

static int intel_crtc_compute_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

6873

static void i9xx_update_pll_dividers(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

6929

static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

6942

static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

6975

void intel_dp_set_m_n(struct intel_crtc *crtc, enum link_m_n_set m_n)

sys/dev/drm/i915/intel_display.c

7000

static void vlv_compute_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7017

static void chv_compute_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7033

static void vlv_prepare_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7132

static void chv_prepare_pll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7250

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_display.c

7292

static void i9xx_compute_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7365

static void i8xx_compute_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7403

static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

7405

struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);

sys/dev/drm/i915/intel_display.c

7406

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

7407

enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

sys/dev/drm/i915/intel_display.c

7408

const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;

sys/dev/drm/i915/intel_display.c

7422

if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))

sys/dev/drm/i915/intel_display.c

7464

static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

7466

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_display.c

7468

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

7474

((intel_crtc->config->pipe_src_w - 1) << 16) |

sys/dev/drm/i915/intel_display.c

7475

(intel_crtc->config->pipe_src_h - 1));

sys/dev/drm/i915/intel_display.c

7478

static void intel_get_pipe_timings(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7513

static void intel_get_pipe_src_size(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7551

static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)

sys/dev/drm/i915/intel_display.c

7553

struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);

sys/dev/drm/i915/intel_display.c

7560

pipeconf |= I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE;

sys/dev/drm/i915/intel_display.c

7562

if (intel_crtc->config->double_wide)

sys/dev/drm/i915/intel_display.c

7569

if (intel_crtc->config->dither && intel_crtc->config->pipe_bpp != 30)

sys/dev/drm/i915/intel_display.c

7573

switch (intel_crtc->config->pipe_bpp) {

sys/dev/drm/i915/intel_display.c

7589

if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {

sys/dev/drm/i915/intel_display.c

7591

intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))

sys/dev/drm/i915/intel_display.c

7599

intel_crtc->config->limited_color_range)

sys/dev/drm/i915/intel_display.c

7602

I915_WRITE(PIPECONF(intel_crtc->pipe), pipeconf);

sys/dev/drm/i915/intel_display.c

7603

POSTING_READ(PIPECONF(intel_crtc->pipe));

sys/dev/drm/i915/intel_display.c

7606

static int i8xx_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7642

static int g4x_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7685

static int pnv_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7719

static int i9xx_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7753

static int chv_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7774

static int vlv_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7795

static void i9xx_get_pfit_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7822

static void vlv_crtc_clock_get(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7850

i9xx_get_initial_plane_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7932

static void chv_crtc_clock_get(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

7966

static bool i9xx_get_pipe_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8512

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

8513

int pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_display.c

8518

switch (intel_crtc->config->pipe_bpp) {

sys/dev/drm/i915/intel_display.c

8536

if (intel_crtc->config->dither)

sys/dev/drm/i915/intel_display.c

8539

if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)

sys/dev/drm/i915/intel_display.c

8544

if (intel_crtc->config->limited_color_range)

sys/dev/drm/i915/intel_display.c

8554

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

8555

enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

sys/dev/drm/i915/intel_display.c

8558

if (IS_HASWELL(dev_priv) && intel_crtc->config->dither)

sys/dev/drm/i915/intel_display.c

8561

if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)

sys/dev/drm/i915/intel_display.c

8573

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_display.c

8574

struct intel_crtc_state *config = intel_crtc->config;

sys/dev/drm/i915/intel_display.c

8579

switch (intel_crtc->config->pipe_bpp) {

sys/dev/drm/i915/intel_display.c

8597

if (intel_crtc->config->dither)

sys/dev/drm/i915/intel_display.c

8606

I915_WRITE(PIPEMISC(intel_crtc->pipe), val);

sys/dev/drm/i915/intel_display.c

8626

static void ironlake_compute_dpll(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_display.c

8630

struct drm_crtc *crtc = &intel_crtc->base;

sys/dev/drm/i915/intel_display.c

8728

static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8783

static void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8799

static void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8840

void intel_dp_get_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8851

static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8858

static void skylake_get_pfit_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

8889

skylake_get_initial_plane_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

896

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

9015

static void ironlake_get_pfit_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

9039

static bool ironlake_get_pipe_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

9139

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_display.c

9356

static int haswell_crtc_compute_clock(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

9506

static bool hsw_get_transcoder_state(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

9558

static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

956

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

9606

static void haswell_get_ddi_port_state(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

9652

static bool haswell_get_pipe_config(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_display.c

9981

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_display.h

319

#define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \

sys/dev/drm/i915/intel_display.h

323

for_each_if((intel_plane)->pipe == (intel_crtc)->pipe)

sys/dev/drm/i915/intel_display.h

325

#define for_each_intel_crtc(dev, intel_crtc) \

sys/dev/drm/i915/intel_display.h

326

list_for_each_entry(intel_crtc, \

sys/dev/drm/i915/intel_display.h

330

#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \

sys/dev/drm/i915/intel_display.h

331

list_for_each_entry(intel_crtc, \

sys/dev/drm/i915/intel_display.h

334

for_each_if((crtc_mask) & drm_crtc_mask(&intel_crtc->base))

sys/dev/drm/i915/intel_dp.c

2031

struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_dp.c

2062

intel_gmch_panel_fitting(intel_crtc, pipe_config,

sys/dev/drm/i915/intel_dp.c

2065

intel_pch_panel_fitting(intel_crtc, pipe_config,

sys/dev/drm/i915/intel_dp.c

2138

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_dp.c

2724

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_dp.c

2764

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_dp.c

2906

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_dp.c

3173

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_dp.c

3305

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dp.c

3828

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_dp.c

4371

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_dp.c

6062

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dp.c

6078

if (!intel_crtc) {

sys/dev/drm/i915/intel_dp.c

6106

intel_dp_set_m_n(intel_crtc, M1_N1);

sys/dev/drm/i915/intel_dp.c

6109

intel_dp_set_m_n(intel_crtc, M2_N2);

sys/dev/drm/i915/intel_dp_mst.c

405

struct intel_crtc *crtc = to_intel_crtc(state->crtc);

sys/dev/drm/i915/intel_dpio_phy.c

1015

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

1043

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

1072

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

643

struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

645

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_dpio_phy.c

658

if (intel_crtc->config->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

671

if (intel_crtc->config->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

679

for (i = 0; i < intel_crtc->config->lane_count; i++) {

sys/dev/drm/i915/intel_dpio_phy.c

687

for (i = 0; i < intel_crtc->config->lane_count; i++) {

sys/dev/drm/i915/intel_dpio_phy.c

710

for (i = 0; i < intel_crtc->config->lane_count; i++) {

sys/dev/drm/i915/intel_dpio_phy.c

724

if (intel_crtc->config->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

740

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

784

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

865

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

989

struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

992

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_dpll_mgr.c

1302

static bool skl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

134

void intel_prepare_shared_dpll(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_dpll_mgr.c

1377

skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

161

void intel_enable_shared_dpll(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_dpll_mgr.c

1683

bxt_ddi_hdmi_pll_dividers(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

1696

clock, pipe_name(intel_crtc->pipe));

sys/dev/drm/i915/intel_dpll_mgr.c

1806

bxt_ddi_hdmi_set_dpll_hw_state(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

1812

bxt_ddi_hdmi_pll_dividers(intel_crtc, crtc_state, clock, &clk_div);

sys/dev/drm/i915/intel_dpll_mgr.c

1818

bxt_get_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

1902

struct intel_shared_dpll *(*get_dpll)(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

206

void intel_disable_shared_dpll(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_dpll_mgr.c

2276

static bool cnl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

2349

cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

243

intel_find_shared_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

2874

icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

293

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpll_mgr.c

3288

intel_get_shared_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

3312

struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

413

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_dpll_mgr.c

427

ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

765

struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.c

820

hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.h

331

struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.h

335

struct intel_crtc *crtc,

sys/dev/drm/i915/intel_dpll_mgr.h

337

void intel_prepare_shared_dpll(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_dpll_mgr.h

338

void intel_enable_shared_dpll(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_dpll_mgr.h

339

void intel_disable_shared_dpll(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_dpll_mgr.h

36

struct intel_crtc;

sys/dev/drm/i915/intel_drv.h

1016

#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)

sys/dev/drm/i915/intel_drv.h

1250

static inline struct intel_crtc *

sys/dev/drm/i915/intel_drv.h

1256

static inline struct intel_crtc *

sys/dev/drm/i915/intel_drv.h

1356

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_drv.h

1364

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_drv.h

1410

int intel_get_crtc_scanline(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

1429

void hsw_fdi_link_train(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

1503

enum i915_pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

1567

const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_drv.h

1573

u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

1646

void intel_dp_get_m_n(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

1648

void intel_dp_set_m_n(struct intel_crtc *crtc, enum link_m_n_set m_n);

sys/dev/drm/i915/intel_drv.h

1654

bool intel_crtc_active(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

1661

void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

1840

void intel_fbc_pre_update(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

1843

void intel_fbc_post_update(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

1846

void intel_fbc_enable(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

1849

void intel_fbc_disable(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

1912

void intel_pch_panel_fitting(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

1915

void intel_gmch_panel_fitting(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_drv.h

2088

void intel_update_watermarks(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

2124

int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_drv.h

2148

void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

2188

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_drv.h

2199

struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_drv.h

2231

void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

2232

void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc);

sys/dev/drm/i915/intel_drv.h

2237

static inline void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_drv.h

2241

static inline void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_drv.h

990

struct intel_crtc *crtc);

sys/dev/drm/i915/intel_dvo.c

267

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_fbc.c

1036

struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc);

sys/dev/drm/i915/intel_fbc.c

1069

void intel_fbc_enable(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_fbc.c

1117

void intel_fbc_disable(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fbc.c

1245

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_fbc.c

415

static bool multiple_pipes_ok(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_fbc.c

483

static int intel_fbc_alloc_cfb(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fbc.c

627

static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fbc.c

652

static void intel_fbc_update_state_cache(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_fbc.c

693

static bool intel_fbc_can_activate(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fbc.c

814

static void intel_fbc_get_reg_params(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_fbc.c

843

void intel_fbc_pre_update(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_fbc.c

883

struct intel_crtc *crtc = fbc->crtc;

sys/dev/drm/i915/intel_fbc.c

897

static void __intel_fbc_post_update(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fbc.c

929

void intel_fbc_post_update(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fbdev.c

573

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_fbdev.c

580

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_fbdev.c

584

pipe_name(intel_crtc->pipe));

sys/dev/drm/i915/intel_fbdev.c

590

pipe_name(intel_crtc->pipe));

sys/dev/drm/i915/intel_fbdev.c

605

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_fbdev.c

609

pipe_name(intel_crtc->pipe));

sys/dev/drm/i915/intel_fbdev.c

614

pipe_name(intel_crtc->pipe));

sys/dev/drm/i915/intel_fbdev.c

621

cur_size = intel_crtc->config->base.adjusted_mode.crtc_hdisplay;

sys/dev/drm/i915/intel_fbdev.c

625

pipe_name(intel_crtc->pipe),

sys/dev/drm/i915/intel_fbdev.c

631

cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay;

sys/dev/drm/i915/intel_fbdev.c

635

pipe_name(intel_crtc->pipe),

sys/dev/drm/i915/intel_fbdev.c

636

intel_crtc->config->base.adjusted_mode.crtc_hdisplay,

sys/dev/drm/i915/intel_fbdev.c

637

intel_crtc->config->base.adjusted_mode.crtc_vdisplay,

sys/dev/drm/i915/intel_fbdev.c

643

pipe_name(intel_crtc->pipe),

sys/dev/drm/i915/intel_fbdev.c

650

pipe_name(intel_crtc->pipe),

sys/dev/drm/i915/intel_fbdev.c

666

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_fifo_underrun.c

139

static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fifo_underrun.c

205

static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_fifo_underrun.c

253

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_fifo_underrun.c

321

struct intel_crtc *crtc =

sys/dev/drm/i915/intel_fifo_underrun.c

365

struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

sys/dev/drm/i915/intel_fifo_underrun.c

416

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_fifo_underrun.c

443

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_fifo_underrun.c

54

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_fifo_underrun.c

73

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_fifo_underrun.c

87

static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_hdmi.c

1141

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

1249

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

1335

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

1399

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

1660

struct intel_crtc *intel_crtc = to_intel_crtc(config->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

1680

intel_pch_panel_fitting(intel_crtc, config,

sys/dev/drm/i915/intel_hdmi.c

214

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

215

i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);

sys/dev/drm/i915/intel_hdmi.c

230

I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);

sys/dev/drm/i915/intel_hdmi.c

235

I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);

sys/dev/drm/i915/intel_hdmi.c

274

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

275

i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);

sys/dev/drm/i915/intel_hdmi.c

293

I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);

sys/dev/drm/i915/intel_hdmi.c

298

I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);

sys/dev/drm/i915/intel_hdmi.c

332

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

333

i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);

sys/dev/drm/i915/intel_hdmi.c

348

I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data);

sys/dev/drm/i915/intel_hdmi.c

353

I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);

sys/dev/drm/i915/intel_hdmi.c

665

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

698

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

701

i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);

sys/dev/drm/i915/intel_hdmi.c

751

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

753

i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);

sys/dev/drm/i915/intel_hdmi.c

795

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

797

i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);

sys/dev/drm/i915/intel_lvds.c

239

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_lvds.c

402

struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_lvds.c

406

if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) {

sys/dev/drm/i915/intel_lvds.c

437

intel_pch_panel_fitting(intel_crtc, pipe_config,

sys/dev/drm/i915/intel_lvds.c

440

intel_gmch_panel_fitting(intel_crtc, pipe_config,

sys/dev/drm/i915/intel_overlay.c

1065

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_overlay.c

173

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_overlay.c

881

struct intel_crtc *crtc)

sys/dev/drm/i915/intel_panel.c

104

intel_pch_panel_fitting(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_panel.c

304

void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_panel.c

308

struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);

sys/dev/drm/i915/intel_panel.c

360

pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |

sys/dev/drm/i915/intel_pm.c

1286

static void g4x_invalidate_wms(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_pm.c

1313

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1401

struct intel_crtc *crtc,

sys/dev/drm/i915/intel_pm.c

1480

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

1546

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1558

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1564

intel_crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;

sys/dev/drm/i915/intel_pm.c

1645

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1726

static void vlv_invalidate_wms(struct intel_crtc *crtc,

sys/dev/drm/i915/intel_pm.c

1832

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1940

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

2034

struct intel_crtc *crtc,

sys/dev/drm/i915/intel_pm.c

2088

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

2165

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

2177

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

2183

intel_crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;

sys/dev/drm/i915/intel_pm.c

2188

static void i965_update_wm(struct intel_crtc *unused_crtc)

sys/dev/drm/i915/intel_pm.c

2191

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

2261

static void i9xx_update_wm(struct intel_crtc *unused_crtc)

sys/dev/drm/i915/intel_pm.c

2270

struct intel_crtc *crtc, *enabled = NULL;

sys/dev/drm/i915/intel_pm.c

2404

static void i845_update_wm(struct intel_crtc *unused_crtc)

sys/dev/drm/i915/intel_pm.c

2407

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

2745

const struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_pm.c

3101

struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);

sys/dev/drm/i915/intel_pm.c

3145

ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,

sys/dev/drm/i915/intel_pm.c

3159

ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate,

sys/dev/drm/i915/intel_pm.c

3182

struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_pm.c

3189

intel_atomic_get_old_crtc_state(intel_state, intel_crtc);

sys/dev/drm/i915/intel_pm.c

3243

const struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_pm.c

3247

for_each_intel_crtc(dev, intel_crtc) {

sys/dev/drm/i915/intel_pm.c

3248

const struct intel_pipe_wm *active = &intel_crtc->wm.active.ilk;

sys/dev/drm/i915/intel_pm.c

3351

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_pm.c

3396

for_each_intel_crtc(dev, intel_crtc) {

sys/dev/drm/i915/intel_pm.c

3397

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

3399

&intel_crtc->wm.active.ilk.wm[0];

sys/dev/drm/i915/intel_pm.c

3404

results->wm_linetime[pipe] = intel_crtc->wm.active.ilk.linetime;

sys/dev/drm/i915/intel_pm.c

3753

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

4005

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

4119

int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_pm.c

4122

struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);

sys/dev/drm/i915/intel_pm.c

4358

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_pm.c

4359

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

4400

for_each_plane_id_on_crtc(intel_crtc, plane_id) {

sys/dev/drm/i915/intel_pm.c

4426

for_each_plane_id_on_crtc(intel_crtc, plane_id) {

sys/dev/drm/i915/intel_pm.c

474

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

4823

struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);

sys/dev/drm/i915/intel_pm.c

4827

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5037

static void skl_write_plane_wm(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_pm.c

5042

struct drm_crtc *crtc = &intel_crtc->base;

sys/dev/drm/i915/intel_pm.c

5046

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5075

static void skl_write_cursor_wm(struct intel_crtc *intel_crtc,

sys/dev/drm/i915/intel_pm.c

5079

struct drm_crtc *crtc = &intel_crtc->base;

sys/dev/drm/i915/intel_pm.c

5083

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5171

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_pm.c

5178

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5203

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

5237

const struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_pm.c

5238

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5240

for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {

sys/dev/drm/i915/intel_pm.c

5266

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_pm.c

5338

for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {

sys/dev/drm/i915/intel_pm.c

5341

cstate = intel_atomic_get_crtc_state(state, intel_crtc);

sys/dev/drm/i915/intel_pm.c

5411

struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);

sys/dev/drm/i915/intel_pm.c

5436

struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);

sys/dev/drm/i915/intel_pm.c

5437

struct drm_device *dev = intel_crtc->base.dev;

sys/dev/drm/i915/intel_pm.c

5441

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5443

if ((results->dirty_pipes & drm_crtc_mask(&intel_crtc->base)) == 0)

sys/dev/drm/i915/intel_pm.c

5462

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

5514

struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);

sys/dev/drm/i915/intel_pm.c

5517

intel_crtc->wm.active.ilk = cstate->wm.ilk.intermediate;

sys/dev/drm/i915/intel_pm.c

5526

struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);

sys/dev/drm/i915/intel_pm.c

5530

intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;

sys/dev/drm/i915/intel_pm.c

5549

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_pm.c

5550

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5557

for_each_plane_id_on_crtc(intel_crtc, plane_id) {

sys/dev/drm/i915/intel_pm.c

5577

if (!intel_crtc->active)

sys/dev/drm/i915/intel_pm.c

5589

struct intel_crtc *intel_crtc;

sys/dev/drm/i915/intel_pm.c

5594

intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_pm.c

5599

if (intel_crtc->active)

sys/dev/drm/i915/intel_pm.c

5621

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_pm.c

5624

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/intel_pm.c

5637

active->pipe_enabled = intel_crtc->active;

sys/dev/drm/i915/intel_pm.c

5665

intel_crtc->wm.active.ilk = *active;

sys/dev/drm/i915/intel_pm.c

5779

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

5863

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

5868

struct intel_crtc *crtc =

sys/dev/drm/i915/intel_pm.c

5920

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

6017

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_pm.c

6022

struct intel_crtc *crtc =

sys/dev/drm/i915/intel_pm.c

6144

void intel_update_watermarks(struct intel_crtc *crtc)

sys/dev/drm/i915/intel_pm.c

825

static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)

sys/dev/drm/i915/intel_pm.c

827

struct intel_crtc *crtc, *enabled = NULL;

sys/dev/drm/i915/intel_pm.c

840

static void pineview_update_wm(struct intel_crtc *unused_crtc)

sys/dev/drm/i915/intel_pm.c

843

struct intel_crtc *crtc;

sys/dev/drm/i915/intel_psr.c

762

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

sys/dev/drm/i915/intel_sdvo.c

1269

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_sdvo.c

1535

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);

sys/dev/drm/i915/intel_sdvo.c

1594

struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/intel_sdvo.c

1605

intel_wait_for_vblank(dev_priv, intel_crtc->pipe);

sys/dev/drm/i915/intel_sprite.c

1018

g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)

sys/dev/drm/i915/intel_sprite.c

1455

struct intel_crtc *crtc =

sys/dev/drm/i915/intel_sprite.c

186

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

sys/dev/drm/i915/intel_sprite.c

421

skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)

sys/dev/drm/i915/intel_sprite.c

685

vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)

sys/dev/drm/i915/intel_sprite.c

77

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);

sys/dev/drm/i915/intel_sprite.c

851

ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)

sys/dev/drm/i915/intel_tv.c

1031

tv_ctl |= TV_ENC_PIPE_SEL(intel_crtc->pipe);

sys/dev/drm/i915/intel_tv.c

1081

assert_pipe_disabled(dev_priv, intel_crtc->pipe);

sys/dev/drm/i915/intel_tv.c

1135

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/intel_tv.c

1157

tv_ctl |= TV_ENC_PIPE_SEL(intel_crtc->pipe);

sys/dev/drm/i915/intel_tv.c

1182

intel_wait_for_vblank(dev_priv, intel_crtc->pipe);

sys/dev/drm/i915/intel_tv.c

1212

intel_wait_for_vblank(dev_priv, intel_crtc->pipe);

sys/dev/drm/i915/intel_tv.c

987

struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/vlv_dsi.c

1098

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/vlv_dsi.c

1406

struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/vlv_dsi.c

1414

DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe));

sys/dev/drm/i915/vlv_dsi.c

1441

enum i915_pipe pipe = intel_crtc->pipe;

sys/dev/drm/i915/vlv_dsi.c

311

struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);

sys/dev/drm/i915/vlv_dsi.c

676

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/vlv_dsi.c

803

struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

sys/dev/drm/i915/vlv_dsi.c

804

int pipe = intel_crtc->pipe;