integrated_info
kfree(bp->base.integrated_info);
struct integrated_info *info)
struct integrated_info *info)
struct integrated_info *info)
static struct integrated_info *bios_parser_create_integrated_info(
struct integrated_info *info = NULL;
info = kzalloc(sizeof(struct integrated_info), GFP_KERNEL);
bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
kfree(bp->base.integrated_info);
struct integrated_info *info)
struct integrated_info *info)
static struct integrated_info *bios_parser_create_integrated_info(
struct integrated_info *info = NULL;
info = kzalloc(sizeof(struct integrated_info), GFP_KERNEL);
bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
struct integrated_info info = {{{ 0 }}};
if (bios->integrated_info)
info = *bios->integrated_info;
struct integrated_info *integrated_info =
pipe_ctx->stream->ctx->dc_bios->integrated_info;
if (integrated_info == NULL)
if (integrated_info->gpu_cap_info & 0x20) {
settings->slv_addr = integrated_info->dp0_ext_hdmi_slv_addr;
settings->reg_num = integrated_info->dp0_ext_hdmi_6g_reg_num;
settings->reg_num_6g = integrated_info->dp0_ext_hdmi_6g_reg_num;
integrated_info->dp0_ext_hdmi_reg_settings,
sizeof(integrated_info->dp0_ext_hdmi_reg_settings));
integrated_info->dp0_ext_hdmi_6g_reg_settings,
sizeof(integrated_info->dp0_ext_hdmi_6g_reg_settings));
settings->slv_addr = integrated_info->dp1_ext_hdmi_slv_addr;
settings->reg_num = integrated_info->dp1_ext_hdmi_6g_reg_num;
settings->reg_num_6g = integrated_info->dp1_ext_hdmi_6g_reg_num;
integrated_info->dp1_ext_hdmi_reg_settings,
sizeof(integrated_info->dp1_ext_hdmi_reg_settings));
integrated_info->dp1_ext_hdmi_6g_reg_settings,
sizeof(integrated_info->dp1_ext_hdmi_6g_reg_settings));
settings->slv_addr = integrated_info->dp2_ext_hdmi_slv_addr;
settings->reg_num = integrated_info->dp2_ext_hdmi_6g_reg_num;
settings->reg_num_6g = integrated_info->dp2_ext_hdmi_6g_reg_num;
integrated_info->dp2_ext_hdmi_reg_settings,
sizeof(integrated_info->dp2_ext_hdmi_reg_settings));
integrated_info->dp2_ext_hdmi_6g_reg_settings,
sizeof(integrated_info->dp2_ext_hdmi_6g_reg_settings));
settings->slv_addr = integrated_info->dp3_ext_hdmi_slv_addr;
settings->reg_num = integrated_info->dp3_ext_hdmi_6g_reg_num;
settings->reg_num_6g = integrated_info->dp3_ext_hdmi_6g_reg_num;
integrated_info->dp3_ext_hdmi_reg_settings,
sizeof(integrated_info->dp3_ext_hdmi_reg_settings));
integrated_info->dp3_ext_hdmi_6g_reg_settings,
sizeof(integrated_info->dp3_ext_hdmi_6g_reg_settings));
struct integrated_info *integrated_info;
struct integrated_info info = { { { 0 } } };
if (bp->integrated_info)
info = *bp->integrated_info;
if (!debug->disable_dfs_bypass && bp->integrated_info)
if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE)
if (bp->integrated_info)
clk_dce->dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq;
if (!debug->disable_dfs_bypass && bp->integrated_info)
if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE)