sys/dev/drm/amd/amdgpu/si_dpm.c

6446

tmp = (RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;

sys/dev/drm/amd/amdgpu/si_dpm.c

6448

tmp = (RREG32(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;

sys/dev/drm/amd/amdgpu/si_dpm.c

6453

tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK;

sys/dev/drm/amd/amdgpu/si_dpm.c

6455

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/si_dpm.c

6457

tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

sys/dev/drm/amd/amdgpu/si_dpm.c

6459

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/si_dpm.c

6647

tmp = RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;

sys/dev/drm/amd/amdgpu/si_dpm.c

6709

tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

sys/dev/drm/amd/amdgpu/si_dpm.c

6711

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/si_dpm.c

6713

tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK;

sys/dev/drm/amd/amdgpu/si_dpm.c

6715

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/si_dpm.c

6738

tmp = RREG32(CG_FDO_CTRL2) & ~TACH_PWM_RESP_RATE_MASK;

sys/dev/drm/amd/amdgpu/si_dpm.c

6740

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

116

CG_FDO_CTRL2, FDO_PWM_MODE);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

119

CG_FDO_CTRL2, TMIN);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

124

CG_FDO_CTRL2, TMIN, 0);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

126

CG_FDO_CTRL2, FDO_PWM_MODE, mode);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

140

CG_FDO_CTRL2, FDO_PWM_MODE, hwmgr->fan_ctrl_default_mode);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

142

CG_FDO_CTRL2, TMIN, hwmgr->tmin);

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

354

CG_FDO_CTRL2, TACH_PWM_RESP_RATE, 0x28);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

135

CG_FDO_CTRL2, FDO_PWM_MODE);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

138

CG_FDO_CTRL2, TMIN);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

144

CG_FDO_CTRL2, TMIN, 0));

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

147

CG_FDO_CTRL2, FDO_PWM_MODE, mode));

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

164

CG_FDO_CTRL2, FDO_PWM_MODE,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

168

CG_FDO_CTRL2, TMIN,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

415

CG_FDO_CTRL2, TACH_PWM_RESP_RATE, 0x28));

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

96

CG_FDO_CTRL2, TMIN, 0));

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

99

CG_FDO_CTRL2, FDO_PWM_MODE, mode));

sys/dev/drm/radeon/ci_dpm.c

1191

tmp = RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;

sys/dev/drm/radeon/ci_dpm.c

1253

tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

sys/dev/drm/radeon/ci_dpm.c

1255

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

1257

tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;

sys/dev/drm/radeon/ci_dpm.c

1259

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

1282

tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TACH_PWM_RESP_RATE_MASK;

sys/dev/drm/radeon/ci_dpm.c

1284

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

975

tmp = (RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;

sys/dev/drm/radeon/ci_dpm.c

977

tmp = (RREG32_SMC(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;

sys/dev/drm/radeon/ci_dpm.c

982

tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;

sys/dev/drm/radeon/ci_dpm.c

984

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

986

tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

sys/dev/drm/radeon/ci_dpm.c

988

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/si_dpm.c

6014

tmp = (RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;

sys/dev/drm/radeon/si_dpm.c

6016

tmp = (RREG32(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;

sys/dev/drm/radeon/si_dpm.c

6021

tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK;

sys/dev/drm/radeon/si_dpm.c

6023

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/si_dpm.c

6025

tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

sys/dev/drm/radeon/si_dpm.c

6027

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/si_dpm.c

6218

tmp = RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;

sys/dev/drm/radeon/si_dpm.c

6280

tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

sys/dev/drm/radeon/si_dpm.c

6282

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/si_dpm.c

6284

tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK;

sys/dev/drm/radeon/si_dpm.c

6286

WREG32(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/si_dpm.c

6309

tmp = RREG32(CG_FDO_CTRL2) & ~TACH_PWM_RESP_RATE_MASK;

sys/dev/drm/radeon/si_dpm.c

6311

WREG32(CG_FDO_CTRL2, tmp);