games/rogue/monster.c

478

mvaddch(row, col, gmc(monster));

games/rogue/monster.c

686

mvaddch(row, col, gmc(monster));

games/rogue/rogue.h

531

short gmc(object *);

games/rogue/zap.c

214

mvaddch(row, col, gmc(monster));

sys/dev/drm/amd/amdgpu/amdgpu.h

921

struct amdgpu_gmc gmc;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

362

resource_size_t aper_limit = adev->gmc.aper_base + adev->gmc.aper_size;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

365

if (!(adev->gmc.aper_base & address_mask || aper_limit & address_mask)) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

366

mem_info->local_mem_size_public = adev->gmc.visible_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

367

mem_info->local_mem_size_private = adev->gmc.real_vram_size -

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

368

adev->gmc.visible_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

371

mem_info->local_mem_size_private = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

373

mem_info->vram_width = adev->gmc.vram_width;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

376

&adev->gmc.aper_base, &aper_limit,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

445

return adev->gmc.xgmi.hive_id;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

311

total_vram = adev->gmc.real_vram_size - atomic64_read(&adev->vram_pin_size);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

356

if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) {

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

357

u64 total_vis_vram = adev->gmc.visible_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

413

if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

435

if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

488

!amdgpu_gmc_vram_full_visible(&adev->gmc) &&

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2388

adev->gmc.gart_size = 512 * 1024 * 1024;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2398

adev->gmc.gmc_funcs = NULL;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2646

(uintmax_t)adev->gmc.aper_base,

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2647

(uintmax_t)adev->gmc.aper_base + adev->gmc.visible_vram_size);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2649

adev->gmc.aper_base,

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2650

adev->gmc.aper_base + adev->gmc.visible_vram_size,

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2654

(uintmax_t)adev->gmc.aper_base,

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2655

(uintmax_t)adev->gmc.aper_base + adev->gmc.visible_vram_size, r);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

669

u64 space_needed = roundup_pow_of_two(adev->gmc.real_vram_size);

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

268

unsigned long tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

270

info->paddr = adev->gmc.aper_base + tmp;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

279

tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

280

info->fix.smem_start = adev->gmc.aper_base + tmp;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

289

info->apertures->ranges[0].size = adev->gmc.aper_size;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

300

DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->gmc.aper_base);

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

357

if (adev->gmc.real_vram_size <= (32*1024*1024))

sys/dev/drm/amd/amdgpu/amdgpu_gart.c

362

adev->gart.num_cpu_pages = adev->gmc.gart_size / PAGE_SIZE;

sys/dev/drm/amd/amdgpu/amdgpu_gart.c

363

adev->gart.num_gpu_pages = adev->gmc.gart_size / AMDGPU_GPU_PAGE_SIZE;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

102

return adev->gmc.agp_start + ttm->dma_address[0];

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

150

u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

99

if (ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size)

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

154

#define amdgpu_gmc_flush_gpu_tlb(adev, vmid) (adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

155

#define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((r), (vmid), (addr))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

156

#define amdgpu_gmc_emit_pasid_mapping(r, vmid, pasid) (r)->adev->gmc.gmc_funcs->emit_pasid_mapping((r), (vmid), (pasid))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

157

#define amdgpu_gmc_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gmc.gmc_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

158

#define amdgpu_gmc_get_vm_pde(adev, level, dst, flags) (adev)->gmc.gmc_funcs->get_vm_pde((adev), (level), (dst), (flags))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

159

#define amdgpu_gmc_get_pte_flags(adev, flags) (adev)->gmc.gmc_funcs->get_vm_pte_flags((adev),(flags))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

169

static inline bool amdgpu_gmc_vram_full_visible(struct amdgpu_gmc *gmc)

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

171

WARN_ON(gmc->real_vram_size < gmc->visible_vram_size);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

173

return (gmc->real_vram_size == gmc->visible_vram_size);

sys/dev/drm/amd/amdgpu/amdgpu_gtt_mgr.c

59

size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

269

fw_info->ver = adev->gmc.fw_version;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

609

vram_gtt.vram_size = adev->gmc.real_vram_size -

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

611

vram_gtt.vram_cpu_accessible_size = adev->gmc.visible_vram_size -

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

623

mem.vram.total_heap_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

624

mem.vram.usable_heap_size = adev->gmc.real_vram_size -

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

631

adev->gmc.visible_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

632

mem.cpu_accessible_vram.usable_heap_size = adev->gmc.visible_vram_size -

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

743

dev_info.vram_type = adev->gmc.vram_type;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

744

dev_info.vram_bit_width = adev->gmc.vram_width;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1034

arch_io_reserve_memtype_wc(adev->gmc.aper_base,

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1035

adev->gmc.aper_size);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1038

adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base,

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1039

adev->gmc.aper_size);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1041

adev->gmc.mc_vram_size >> 20,

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1042

(unsigned long long)adev->gmc.aper_size >> 20);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1044

adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1074

arch_phys_wc_del(adev->gmc.vram_mtrr);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1075

arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1285

if ((offset + size) <= adev->gmc.visible_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1308

(offset + size) > adev->gmc.visible_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1368

if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)

sys/dev/drm/amd/amdgpu/amdgpu_object.c

140

unsigned visible_pfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

503

if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&

sys/dev/drm/amd/amdgpu/amdgpu_object.c

505

bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT)

sys/dev/drm/amd/amdgpu/amdgpu_object.h

202

unsigned fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/amd/amdgpu/amdgpu_test.c

158

(gart_addr - adev->gmc.gart_start +

sys/dev/drm/amd/amdgpu/amdgpu_test.c

161

(vram_addr - adev->gmc.vram_start +

sys/dev/drm/amd/amdgpu/amdgpu_test.c

203

(vram_addr - adev->gmc.vram_start +

sys/dev/drm/amd/amdgpu/amdgpu_test.c

206

(gart_addr - adev->gmc.gart_start +

sys/dev/drm/amd/amdgpu/amdgpu_test.c

216

gart_addr - adev->gmc.gart_start);

sys/dev/drm/amd/amdgpu/amdgpu_test.c

47

n = adev->gmc.gart_size - AMDGPU_IB_POOL_SIZE*64*1024;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1138

placements.lpfn = adev->gmc.gart_size >> PAGE_SHIFT;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1604

while (len && pos < adev->gmc.mc_vram_size) {

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1691

u64 vram_size = adev->gmc.visible_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1804

adev->gmc.real_vram_size >> PAGE_SHIFT);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1813

vis_vram_limit <= adev->gmc.visible_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1814

adev->gmc.visible_vram_size = vis_vram_limit;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1819

adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1820

adev->gmc.visible_vram_size);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1836

r = amdgpu_bo_create_kernel(adev, adev->gmc.stolen_size, PAGE_SIZE,

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1843

(unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1852

adev->gmc.mc_vram_size),

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

195

man->gpu_offset = adev->gmc.gart_start;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1989

size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1991

size = adev->gmc.visible_vram_size;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

203

man->gpu_offset = adev->gmc.vram_start;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2032

*addr = adev->gmc.gart_start;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2285

if (*pos >= adev->gmc.mc_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2292

if (*pos >= adev->gmc.mc_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2329

if (*pos >= adev->gmc.mc_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2336

if (*pos >= adev->gmc.mc_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2566

i_size_write(ent->d_inode, adev->gmc.mc_vram_size);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2568

i_size_write(ent->d_inode, adev->gmc.gart_size);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

274

} else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

285

abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

768

if ((mem->bus.offset + mem->bus.size) > adev->gmc.visible_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

779

mem->bus.base = adev->gmc.aper_base;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1166

pasid_mapping_needed &= adev->gmc.gmc_funcs->emit_pasid_mapping &&

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2170

adev->gmc.gmc_funcs->set_prt(adev, enable);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2181

if (!adev->gmc.gmc_funcs->set_prt)

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2224

if (!adev->gmc.gmc_funcs->set_prt)

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3086

WARN_ONCE((vm->use_cpu_for_update & !amdgpu_gmc_vram_full_visible(&adev->gmc)),

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3215

WARN_ONCE((vm->use_cpu_for_update & !amdgpu_gmc_vram_full_visible(&adev->gmc)),

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3285

bool prt_fini_needed = !!adev->gmc.gmc_funcs->set_prt;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3421

if (amdgpu_gmc_vram_full_visible(&adev->gmc))

sys/dev/drm/amd/amdgpu/amdgpu_vram_mgr.c

115

if (amdgpu_gmc_vram_full_visible(&adev->gmc))

sys/dev/drm/amd/amdgpu/amdgpu_vram_mgr.c

118

if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT)

sys/dev/drm/amd/amdgpu/amdgpu_vram_mgr.c

92

if (start >= adev->gmc.visible_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_vram_mgr.c

95

return (end > adev->gmc.visible_vram_size ?

sys/dev/drm/amd/amdgpu/amdgpu_vram_mgr.c

96

adev->gmc.visible_vram_size : end) - start;

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

103

tmp_adev->gmc.xgmi.device_id,

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

104

tmp_adev->gmc.xgmi.hive_id, ret);

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

111

adev->gmc.xgmi.physical_node_id,

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

112

adev->gmc.xgmi.hive_id);

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

47

if (!adev->gmc.xgmi.hive_id)

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

51

if (tmp->hive_id == adev->gmc.xgmi.hive_id)

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

59

tmp->hive_id = adev->gmc.xgmi.hive_id;

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

76

adev->gmc.xgmi.device_id = psp_xgmi_get_device_id(&adev->psp);

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

77

adev->gmc.xgmi.hive_id = psp_xgmi_get_hive_id(&adev->psp);

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

85

list_add_tail(&adev->gmc.xgmi.head, &hive->device_list);

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

93

adev->gmc.xgmi.device_id,

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

94

adev->gmc.xgmi.hive_id, ret);

sys/dev/drm/amd/amdgpu/amdgpu_xgmi.c

98

list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

2959

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

3082

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

3723

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)

sys/dev/drm/amd/amdgpu/ci_dpm.c

4518

if (adev->gmc.vram_type != AMDGPU_VRAM_TYPE_GDDR5)

sys/dev/drm/amd/amdgpu/ci_dpm.c

4523

if (adev->gmc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

910

u32 switch_limit = adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 300;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2775

adev->ddev->mode_config.fb_base = adev->gmc.aper_base;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2896

adev->ddev->mode_config.fb_base = adev->gmc.aper_base;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2672

adev->ddev->mode_config.fb_base = adev->gmc.aper_base;

sys/dev/drm/amd/amdgpu/dce_virtual.c

389

adev->ddev->mode_config.fb_base = adev->gmc.aper_base;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1949

sh_mem_base = adev->gmc.shared_aperture_start >> 48;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3872

tmp = adev->gmc.shared_aperture_start >> 48;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1990

(adev->gmc.private_aperture_start >> 48));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1992

(adev->gmc.shared_aperture_start >> 48));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

152

if (adev->gmc.translate_further) {

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

204

if (adev->gmc.translate_further)

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

266

adev->gmc.vram_start >> 24);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

268

adev->gmc.vram_end >> 24);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

54

(u32)(adev->gmc.gart_start >> 12));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

56

(u32)(adev->gmc.gart_start >> 44));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

59

(u32)(adev->gmc.gart_end >> 12));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

61

(u32)(adev->gmc.gart_end >> 44));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

70

WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

71

WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

75

min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

85

max((adev->gmc.fb_end >> 18) + 0x1,

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

86

adev->gmc.agp_end >> 18));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

89

max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

92

value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start

sys/dev/drm/amd/amdgpu/gfxhub_v1_1.c

39

adev->gmc.xgmi.num_physical_nodes = max_region + 1;

sys/dev/drm/amd/amdgpu/gfxhub_v1_1.c

40

if (adev->gmc.xgmi.num_physical_nodes > 4)

sys/dev/drm/amd/amdgpu/gfxhub_v1_1.c

43

adev->gmc.xgmi.physical_node_id =

sys/dev/drm/amd/amdgpu/gfxhub_v1_1.c

45

if (adev->gmc.xgmi.physical_node_id > 3)

sys/dev/drm/amd/amdgpu/gfxhub_v1_1.c

47

adev->gmc.xgmi.node_segment_size = REG_GET_FIELD(

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1012

adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1052

adev->gmc.stolen_size = gmc_v7_0_get_vbios_fb_size(adev);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1082

adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info),

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1085

if (!adev->gmc.vm_fault_info)

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1087

atomic_set(&adev->gmc.vm_fault_info_updated, 0);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1098

kfree(adev->gmc.vm_fault_info);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1102

release_firmware(adev->gmc.fw);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1103

adev->gmc.fw = NULL;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1136

amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1317

&& !atomic_read(&adev->gmc.vm_fault_info_updated)) {

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1318

struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1334

atomic_set(&adev->gmc.vm_fault_info_updated, 1);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1400

adev->gmc.gmc_funcs = &gmc_v7_0_gmc_funcs;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1405

adev->gmc.vm_fault.num_types = 1;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1406

adev->gmc.vm_fault.funcs = &gmc_v7_0_irq_funcs;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

156

err = request_firmware(&adev->gmc.fw, fw_name, adev->dev);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

159

err = amdgpu_ucode_validate(adev->gmc.fw);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

164

release_firmware(adev->gmc.fw);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

165

adev->gmc.fw = NULL;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

186

if (!adev->gmc.fw)

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

189

hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

192

adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

195

(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

198

(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

245

amdgpu_gmc_vram_location(adev, &adev->gmc, base);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

288

adev->gmc.vram_start >> 12);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

290

adev->gmc.vram_end >> 12);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

323

adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

324

if (!adev->gmc.vram_width) {

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

366

adev->gmc.vram_width = numchan * chansize;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

369

adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

370

adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

377

adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

378

adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

382

adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

383

adev->gmc.aper_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

388

adev->gmc.visible_vram_size = adev->gmc.aper_size;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

389

if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

390

adev->gmc.visible_vram_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

397

adev->gmc.gart_size = 256ULL << 20;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

405

adev->gmc.gart_size = 1024ULL << 20;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

410

adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

413

gmc_v7_0_vram_gtt_location(adev, &adev->gmc);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

545

if (enable && !adev->gmc.prt_warning) {

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

547

adev->gmc.prt_warning = true;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

648

WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

649

WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

703

(unsigned)(adev->gmc.gart_size >> 20),

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

938

adev->gmc.shared_aperture_start = 0x2000000000000000ULL;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

939

adev->gmc.shared_aperture_end =

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

940

adev->gmc.shared_aperture_start + (4ULL << 30) - 1;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

941

adev->gmc.private_aperture_start =

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

942

adev->gmc.shared_aperture_end + 1;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

943

adev->gmc.private_aperture_end =

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

944

adev->gmc.private_aperture_start + (4ULL << 30) - 1;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

956

return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

975

if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

987

adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

991

adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

994

r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

998

r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1056

adev->gmc.shared_aperture_start = 0x2000000000000000ULL;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1057

adev->gmc.shared_aperture_end =

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1058

adev->gmc.shared_aperture_start + (4ULL << 30) - 1;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1059

adev->gmc.private_aperture_start =

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1060

adev->gmc.shared_aperture_end + 1;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1061

adev->gmc.private_aperture_end =

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1062

adev->gmc.private_aperture_start + (4ULL << 30) - 1;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1074

return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1093

if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1107

adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1117

adev->gmc.vram_type = gmc_v8_0_convert_vram_type(tmp);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1120

r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1124

r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1138

adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1178

adev->gmc.stolen_size = gmc_v8_0_get_vbios_fb_size(adev);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1208

adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info),

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1211

if (!adev->gmc.vm_fault_info)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1213

atomic_set(&adev->gmc.vm_fault_info_updated, 0);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1224

kfree(adev->gmc.vm_fault_info);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1228

release_firmware(adev->gmc.fw);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1229

adev->gmc.fw = NULL;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1270

amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1350

adev->gmc.srbm_soft_reset = srbm_soft_reset;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1353

adev->gmc.srbm_soft_reset = 0;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1362

if (!adev->gmc.srbm_soft_reset)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1378

if (!adev->gmc.srbm_soft_reset)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1380

srbm_soft_reset = adev->gmc.srbm_soft_reset;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1408

if (!adev->gmc.srbm_soft_reset)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1501

&& !atomic_read(&adev->gmc.vm_fault_info_updated)) {

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1502

struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1518

atomic_set(&adev->gmc.vm_fault_info_updated, 1);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1767

adev->gmc.gmc_funcs = &gmc_v8_0_gmc_funcs;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1772

adev->gmc.vm_fault.num_types = 1;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1773

adev->gmc.vm_fault.funcs = &gmc_v8_0_irq_funcs;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

273

err = request_firmware(&adev->gmc.fw, fw_name, adev->dev);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

276

err = amdgpu_ucode_validate(adev->gmc.fw);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

281

release_firmware(adev->gmc.fw);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

282

adev->gmc.fw = NULL;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

311

if (!adev->gmc.fw)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

314

hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

317

adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

320

(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

323

(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

380

if (!adev->gmc.fw)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

383

hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

386

adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

389

(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

392

(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

436

amdgpu_gmc_vram_location(adev, &adev->gmc, base);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

479

adev->gmc.vram_start >> 12);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

481

adev->gmc.vram_end >> 12);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

486

tmp = ((adev->gmc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

487

tmp |= ((adev->gmc.vram_start >> 24) & 0xFFFF);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

490

WREG32(mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

525

adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

526

if (!adev->gmc.vram_width) {

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

568

adev->gmc.vram_width = numchan * chansize;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

571

adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

572

adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

579

adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

580

adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

584

adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

585

adev->gmc.aper_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

590

adev->gmc.visible_vram_size = adev->gmc.aper_size;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

591

if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

592

adev->gmc.visible_vram_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

602

adev->gmc.gart_size = 256ULL << 20;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

608

adev->gmc.gart_size = 1024ULL << 20;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

612

adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

615

gmc_v8_0_vram_gtt_location(adev, &adev->gmc);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

772

if (enable && !adev->gmc.prt_warning) {

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

774

adev->gmc.prt_warning = true;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

891

WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

892

WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

947

(unsigned)(adev->gmc.gart_size >> 20),

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1015

adev->gmc.stolen_size = gmc_v9_0_get_vbios_fb_size(adev);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1139

(unsigned)(adev->gmc.gart_size >> 20),

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1190

amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

292

adev->gmc.vm_fault.num_types = 1;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

293

adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

395

spin_lock(&adev->gmc.invalidate_lock);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

408

spin_unlock(&adev->gmc.invalidate_lock);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

421

spin_unlock(&adev->gmc.invalidate_lock);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

424

spin_unlock(&adev->gmc.invalidate_lock);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

568

adev->gmc.vram_start;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

571

if (!adev->gmc.translate_further)

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

598

adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

608

adev->gmc.shared_aperture_start = 0x2000000000000000ULL;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

609

adev->gmc.shared_aperture_end =

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

610

adev->gmc.shared_aperture_start + (4ULL << 30) - 1;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

611

adev->gmc.private_aperture_start = 0x1000000000000000ULL;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

612

adev->gmc.private_aperture_end =

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

613

adev->gmc.private_aperture_start + (4ULL << 30) - 1;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

766

return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

776

base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

777

amdgpu_gmc_vram_location(adev, &adev->gmc, base);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

786

adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

804

adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

805

if (!adev->gmc.vram_width) {

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

813

adev->gmc.vram_width = numchan * chansize;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

817

adev->gmc.mc_vram_size =

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

819

adev->gmc.real_vram_size = adev->gmc.mc_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

826

adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

827

adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

831

adev->gmc.aper_base = gfxhub_v1_0_get_mc_fb_offset(adev);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

832

adev->gmc.aper_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

836

adev->gmc.visible_vram_size = adev->gmc.aper_size;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

837

if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

838

adev->gmc.visible_vram_size = adev->gmc.real_vram_size;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

847

adev->gmc.gart_size = 512ULL << 20;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

850

adev->gmc.gart_size = 1024ULL << 20;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

854

adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

857

gmc_v9_0_vram_gtt_location(adev, &adev->gmc);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

919

if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

934

spin_init(&adev->gmc.invalidate_lock, "aggmcil");

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

936

adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

944

adev->gmc.translate_further =

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

964

&adev->gmc.vm_fault);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

966

&adev->gmc.vm_fault);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

975

adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

103

max((adev->gmc.fb_end >> 18) + 0x1,

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

104

adev->gmc.agp_end >> 18));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

107

max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

110

value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

171

if (adev->gmc.translate_further) {

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

223

if (adev->gmc.translate_further)

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

298

adev->gmc.vram_start >> 24);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

300

adev->gmc.vram_end >> 24);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

49

adev->gmc.fb_start = base;

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

50

adev->gmc.fb_end = top;

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

71

(u32)(adev->gmc.gart_start >> 12));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

73

(u32)(adev->gmc.gart_start >> 44));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

76

(u32)(adev->gmc.gart_end >> 12));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

78

(u32)(adev->gmc.gart_end >> 44));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

88

WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

89

WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

93

min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

569

if (psp->adev->gmc.xgmi.num_physical_nodes)

sys/dev/drm/amd/amdgpu/si_dpm.c

3070

u32 switch_limit = adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 0;

sys/dev/drm/amd/amdgpu/si_dpm.c

4333

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)

sys/dev/drm/amd/amdgpu/si_dpm.c

4920

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/amdgpu/si_dpm.c

5192

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)

sys/dev/drm/amd/amdgpu/si_dpm.c

5369

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/amdgpu/si_dpm.c

5381

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)

sys/dev/drm/amd/amdgpu/si_dpm.c

5473

if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/amdgpu/si_dpm.c

5844

if (adev->gmc.vram_type != AMDGPU_VRAM_TYPE_GDDR5)

sys/dev/drm/amd/amdgpu/si_dpm.c

5849

if (adev->gmc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1598

adev->ddev->mode_config.fb_base = adev->gmc.aper_base;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

408

init_data.asic_id.vram_width = adev->gmc.vram_width;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4285

data->is_memory_gddr5 = (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5);