gfx_v9_0_select_se_sh
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
.select_se_sh = &gfx_v9_0_select_se_sh,
gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff);
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff);
gfx_v9_0_select_se_sh(adev, 0xffffffff,
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff);
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff);
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num);