drm_dp_dpcd_read
if (drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
if (drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
ret = drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_DPCD_REV,
dret = drm_dp_dpcd_read(
dret = drm_dp_dpcd_read(
return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address,
res = drm_dp_dpcd_read(aux_dev->aux, pos, buf, todo);
ret = drm_dp_dpcd_read(aux, DP_TEST_CRC_R_CR, crc, 6);
ret = drm_dp_dpcd_read(aux, offset, ident, sizeof(*ident));
EXPORT_SYMBOL(drm_dp_dpcd_read);
return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
return drm_dp_dpcd_read(aux, DP_BRANCH_ID, id, 6);
len = drm_dp_dpcd_read(aux, DP_BRANCH_HW_REV, &rev[0], 1);
len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, rev, 2);
ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
sret = drm_dp_dpcd_read(mgr->aux, DP_GUID, guid, 16);
ret = drm_dp_dpcd_read(mgr->aux, basereg,
ret = drm_dp_dpcd_read(mgr->aux, basereg + curreply,
if (drm_dp_dpcd_read(mgr->aux,
ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, buf, DP_RECEIVER_CAP_SIZE);
ret = drm_dp_dpcd_read(mgr->aux, DP_FAUX_CAP, buf, 2);
ret = drm_dp_dpcd_read(mgr->aux, DP_MSTM_CTRL, buf, 1);
ret = drm_dp_dpcd_read(mgr->aux, DP_BRANCH_OUI, buf, DP_BRANCH_OUI_HEADER_SIZE);
return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status,
if (drm_dp_dpcd_read(&intel_dp->aux, 0x000, intel_dp->dpcd,
if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
if (drm_dp_dpcd_read(&intel_dp->aux, DP_DOWNSTREAM_PORT_0,
return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI,
status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI,
status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_BINFO,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_BCAPS,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
return drm_dp_dpcd_read(aux, offset, valuep, 1);
if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,