sys/dev/drm/amd/amdgpu/amdgpu_ucode.h

180

struct dmcu_firmware_header_v1_0 dmcu;

sys/dev/drm/amd/display/dc/core/dc.c

757

if (dc->res_pool->dmcu != NULL)

sys/dev/drm/amd/display/dc/core/dc.c

758

dc->versions.dmcu_version = dc->res_pool->dmcu->dmcu_version;

sys/dev/drm/amd/display/dc/core/dc_link.c

2184

struct dmcu *dmcu = core_dc->res_pool->dmcu;

sys/dev/drm/amd/display/dc/core/dc_link.c

2190

if ((dmcu == NULL) ||

sys/dev/drm/amd/display/dc/core/dc_link.c

2202

use_smooth_brightness = dmcu->funcs->is_dmcu_initialized(dmcu);

sys/dev/drm/amd/display/dc/core/dc_link.c

2248

struct dmcu *dmcu = core_dc->res_pool->dmcu;

sys/dev/drm/amd/display/dc/core/dc_link.c

2250

if (dmcu != NULL && link->psr_enabled)

sys/dev/drm/amd/display/dc/core/dc_link.c

2251

dmcu->funcs->set_psr_enable(dmcu, enable, wait);

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

284

struct dmcu *dmcu = core_dc->res_pool->dmcu;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

289

dmcu->funcs->set_psr_wait_loop(dmcu, actual_clk_khz / 1000 / 7);

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

301

struct dmcu *dmcu = core_dc->res_pool->dmcu;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

338

dmcu->funcs->set_psr_wait_loop(dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

115

static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

117

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

141

dce_get_dmcu_psr_state(dmcu, &psr_state);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

154

static bool dce_dmcu_setup_psr(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

158

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

239

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1),

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

251

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2),

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

256

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3),

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

269

static bool dce_is_dmcu_initialized(struct dmcu *dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

271

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

285

struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

288

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

291

if (dmcu->cached_wait_loop_number == wait_loop_number)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

295

if (!dce_is_dmcu_initialized(dmcu))

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

303

dmcu->cached_wait_loop_number = wait_loop_number;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

304

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

314

struct dmcu *dmcu, unsigned int *psr_wait_loop_number)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

316

*psr_wait_loop_number = dmcu->cached_wait_loop_number;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

321

static void dcn10_get_dmcu_state(struct dmcu *dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

323

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

337

dmcu->dmcu_state = REG_READ(DMCU_IRAM_RD_DATA);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

34

#define TO_DCE_DMCU(dmcu)\

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

345

static void dcn10_get_dmcu_version(struct dmcu *dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

347

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

35

container_of(dmcu, struct dce_dmcu, base)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

362

dmcu->dmcu_version.interface_version = REG_READ(DMCU_IRAM_RD_DATA);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

363

dmcu->dmcu_version.year = ((REG_READ(DMCU_IRAM_RD_DATA) << 8) |

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

365

dmcu->dmcu_version.month = REG_READ(DMCU_IRAM_RD_DATA);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

366

dmcu->dmcu_version.date = REG_READ(DMCU_IRAM_RD_DATA);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

390

if (dmcu->dmcu_version.interface_version != REG_READ(DC_DMCU_SCRATCH))

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

391

dmcu->dmcu_version.interface_version = 0;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

394

static bool dcn10_dmcu_init(struct dmcu *dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

396

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

403

dcn10_get_dmcu_state(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

406

if (dmcu->dmcu_state == DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

410

dcn10_get_dmcu_version(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

413

if (dmcu->dmcu_version.interface_version == 0)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

433

dcn10_get_dmcu_state(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

436

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

442

static bool dcn10_dmcu_load_iram(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

447

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

451

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

487

static void dcn10_get_dmcu_psr_state(struct dmcu *dmcu, uint32_t *psr_state)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

489

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

494

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

514

static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

516

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

524

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

527

dcn10_get_dmcu_psr_state(dmcu, &psr_state);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

552

dcn10_get_dmcu_psr_state(dmcu, &psr_state);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

569

static bool dcn10_dmcu_setup_psr(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

57

static bool dce_dmcu_init(struct dmcu *dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

573

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

583

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

64

bool dce_dmcu_load_iram(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

658

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1),

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

670

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2),

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

675

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3),

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

69

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

692

struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

695

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

699

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

708

dmcu->cached_wait_loop_number = wait_loop_number;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

709

dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

720

struct dmcu *dmcu, unsigned int *psr_wait_loop_number)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

722

*psr_wait_loop_number = dmcu->cached_wait_loop_number;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

726

static bool dcn10_is_dmcu_initialized(struct dmcu *dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

729

if (dmcu->dmcu_state != DMCU_RUNNING)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

767

struct dmcu *base = &dmcu_dce->base;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

778

struct dmcu *dce_dmcu_create(

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

800

struct dmcu *dcn10_dmcu_create(

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

822

void dce_dmcu_destroy(struct dmcu **dmcu)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

824

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(*dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

827

*dmcu = NULL;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

92

static void dce_get_dmcu_psr_state(struct dmcu *dmcu, uint32_t *psr_state)

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

94

struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);

sys/dev/drm/amd/display/dc/dce/dce_dmcu.h

181

struct dmcu base;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.h

252

struct dmcu *dce_dmcu_create(

sys/dev/drm/amd/display/dc/dce/dce_dmcu.h

258

struct dmcu *dcn10_dmcu_create(

sys/dev/drm/amd/display/dc/dce/dce_dmcu.h

264

void dce_dmcu_destroy(struct dmcu **dmcu);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

740

if (pool->base.dmcu != NULL)

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

741

dce_dmcu_destroy(&pool->base.dmcu);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

932

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

936

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1277

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1281

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

764

if (pool->base.dmcu != NULL)

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

765

dce_dmcu_destroy(&pool->base.dmcu);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1223

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1227

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

758

if (pool->base.dmcu != NULL)

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

759

dce_dmcu_destroy(&pool->base.dmcu);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

579

if (pool->base.dmcu != NULL)

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

580

dce_dmcu_destroy(&pool->base.dmcu);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

989

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

993

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1151

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1155

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1357

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1361

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

778

if (pool->base.dmcu != NULL)

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

779

dce_dmcu_destroy(&pool->base.dmcu);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

941

pool->base.dmcu = dce_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

945

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1115

if (dmcu != NULL)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1116

dmcu->funcs->dmcu_init(dmcu);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

980

struct dmcu *dmcu = dc->res_pool->dmcu;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1292

pool->base.dmcu = dcn10_dmcu_create(ctx,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1296

if (pool->base.dmcu == NULL) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

954

if (pool->base.dmcu != NULL)

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

955

dce_dmcu_destroy(&pool->base.dmcu);

sys/dev/drm/amd/display/dc/inc/core_types.h

176

struct dmcu *dmcu;

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

45

bool (*dmcu_init)(struct dmcu *dmcu);

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

46

bool (*load_iram)(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

50

void (*set_psr_enable)(struct dmcu *dmcu, bool enable, bool wait);

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

51

bool (*setup_psr)(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

54

void (*get_psr_state)(struct dmcu *dmcu, uint32_t *psr_state);

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

55

void (*set_psr_wait_loop)(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

57

void (*get_psr_wait_loop)(struct dmcu *dmcu,

sys/dev/drm/amd/display/dc/inc/hw/dmcu.h

59

bool (*is_dmcu_initialized)(struct dmcu *dmcu);