sys/dev/drm/amd/amdgpu/dce_v10_0.c

1025

active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1027

line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

sys/dev/drm/amd/amdgpu/dce_v10_0.c

908

tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1051

active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1053

line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

sys/dev/drm/amd/amdgpu/dce_v11_0.c

934

tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

843

tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

960

active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,

sys/dev/drm/amd/amdgpu/dce_v8_0.c

962

line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

sys/dev/drm/amd/display/dc/bios/command_table.c

1516

div_u64(pixel_clk * pixel_clk_10_khz_out,

sys/dev/drm/amd/display/dc/dce/dce_abm.c

91

current_backlight = div_u64(current_backlight, bl_period);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

145

feedback_divider = div_u64(feedback_divider, calc_pll_cs->ref_freq_khz);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

156

div_u64(feedback_divider,

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

216

div_u64(actual_calc_clk_khz,

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

975

m_vid_l = div_u64(m_vid_l,

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

835

m_vid_l = div_u64(m_vid_l,

sys/dev/drm/amd/display/modules/freesync/freesync.c

1049

div_u64(nominal_field_rate_in_uhz + 500000, 1000000);

sys/dev/drm/amd/display/modules/freesync/freesync.c

996

nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,

sys/dev/drm/amd/display/modules/freesync/freesync.c

998

nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,

sys/dev/drm/drm_vblank.c

524

linedur_ns = div_u64((u64) mode->crtc_htotal * 1000000, dotclock);

sys/dev/drm/drm_vblank.c

525

framedur_ns = div_u64((u64) frame_size * 1000000, dotclock);

sys/dev/drm/i915/i915_drv.h

3732

div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ)

sys/dev/drm/i915/i915_irq.c

922

scanline = div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,

sys/dev/drm/i915/i915_pmu.c

549

div_u64(i915->pmu.sample[__I915_SAMPLE_FREQ_ACT].cur,

sys/dev/drm/i915/i915_pmu.c

554

div_u64(i915->pmu.sample[__I915_SAMPLE_FREQ_REQ].cur,

sys/dev/drm/i915/intel_ddi.c

1500

tmp = div_u64(tmp, 5 * div1 * div2);

sys/dev/drm/i915/intel_display.c

10604

return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);

sys/dev/drm/i915/intel_display.c

6714

pixel_rate = div_u64((uint64_t) pixel_rate * pipe_w * pipe_h,

sys/dev/drm/i915/intel_display.c

6833

*ret_m = div_u64((uint64_t) m * *ret_n, n);

sys/dev/drm/i915/intel_display.c

868

*error_ppm = div_u64(1000000ULL *

sys/dev/drm/i915/intel_dpll_mgr.c

1223

params->dco_integer = div_u64(dco_freq, 24 * MHz(1));

sys/dev/drm/i915/intel_dpll_mgr.c

1225

div_u64((div_u64(dco_freq, 24) -

sys/dev/drm/i915/intel_dpll_mgr.c

2209

dco = div_u64((u64)dco_freq << 15, ref_freq);

sys/dev/drm/i915/intel_pm.c

4441

plane_blocks += div_u64((uint64_t)alloc_size * data_rate,

sys/dev/drm/i915/intel_pm.c

4456

uv_plane_blocks += div_u64((uint64_t)alloc_size * uv_data_rate,

sys/dev/drm/i915/intel_pm.c

7828

diff = div_u64(diff, diff1);

sys/dev/drm/i915/intel_pm.c

7830

ret = div_u64(ret, 10);

sys/dev/drm/i915/intel_pm.c

7922

diff = div_u64(diff, diffms * 10);

sys/dev/drm/i915/intel_tv.c

1368

tmp = div_u64(tmp, 1000000);

sys/dev/drm/radeon/cik.c

9158

tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512);

sys/dev/drm/radeon/cik.c

9275

active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,

sys/dev/drm/radeon/cik.c

9277

line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

sys/dev/drm/radeon/evergreen.c

2152

active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,

sys/dev/drm/radeon/evergreen.c

2154

line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

sys/dev/drm/radeon/si.c

2221

tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512);

sys/dev/drm/radeon/si.c

2301

active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,

sys/dev/drm/radeon/si.c

2303

line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,