Symbol: dev_warn
sys/dev/drm/amd/amdgpu/amdgpu_device.c
604
dev_warn(adev->dev, "(%d) create WB bo failed\n", r);
sys/dev/drm/amd/amdgpu/amdgpu_device.c
828
dev_warn(adev->dev, "VM page table size (%d) too small\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
849
dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
906
dev_warn(adev->dev, "sched jobs (%d) must be at least 4\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
910
dev_warn(adev->dev, "sched jobs (%d) must be a power of 2\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
917
dev_warn(adev->dev, "gart size (%d) too small\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
924
dev_warn(adev->dev, "gtt size (%d) too small\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
932
dev_warn(adev->dev, "valid range is between 4 and 9\n");
sys/dev/drm/amd/amdgpu/amdgpu_device.c
944
dev_warn(adev->dev, "invalid VRAM page split (%d)\n",
sys/dev/drm/amd/amdgpu/amdgpu_device.c
950
dev_warn(adev->dev, "lockup_timeout msut be > 0, adjusting to 10000\n");
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
263
dev_warn(adev->dev, "(%d) failed to init kiq ring\n", r);
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
293
dev_warn(adev->dev, "failed to create KIQ bo (%d).\n", r);
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
301
dev_warn(adev->dev, "(%d) reserve kiq eop bo failed\n", r);
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
327
dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r);
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
334
dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
345
dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r);
sys/dev/drm/amd/amdgpu/amdgpu_gfx.c
352
dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);
sys/dev/drm/amd/amdgpu/amdgpu_gmc.c
161
dev_warn(adev->dev, "limiting GART\n");
sys/dev/drm/amd/amdgpu/amdgpu_kms.c
987
dev_warn(adev->dev, "No more PASIDs available!");
sys/dev/drm/amd/amdgpu/amdgpu_object.c
968
dev_warn(adev->dev, "%p unpin not necessary\n", bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2947
dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n",
sys/dev/drm/amd/amdgpu/cik_ih.c
198
dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/amd/amdgpu/cz_ih.c
200
dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
2789
dev_warn(adev->dev, "(%d) create, pin or map of HDP EOP bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
3053
dev_warn(adev->dev, "(%d) create MQD bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
3317
dev_warn(adev->dev, "(%d) create, pin or map of RLC sr bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
3340
dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v7_0.c
3360
dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
1393
dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
1414
dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
1451
dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
3343
dev_warn(adev->dev,
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1272
dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1295
dev_warn(adev->dev, "(%d) create mec firmware bo failed\n", r);
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
1218
dev_warn(adev->dev, "Wait for GMC idle timed out !\n");
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
273
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
297
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
546
dev_warn(adev->dev, "Disabling VM faults because of PRT request!\n");
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
1367
dev_warn(adev->dev, "Wait for GMC idle timed out !\n");
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
464
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
499
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
773
dev_warn(adev->dev, "Disabling VM faults because of PRT request!\n");
sys/dev/drm/amd/amdgpu/iceland_ih.c
200
dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/amd/amdgpu/tonga_ih.c
211
dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/amd/amdgpu/vega10_ih.c
211
dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/drm_edid.c
1572
dev_warn(connector->dev->dev,
sys/dev/drm/drm_edid.c
4740
dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
sys/dev/drm/i915/i915_gem.c
3012
dev_warn(&dev_priv->drm.pdev->dev,
sys/dev/drm/i915/i915_gem.c
4218
dev_warn(&i915->drm.pdev->dev,
sys/dev/drm/radeon/cik.c
4373
dev_warn(rdev->dev, "(%d) reserve MQD bo failed\n", r);
sys/dev/drm/radeon/cik.c
4391
dev_warn(rdev->dev, "(%d) reserve HPD EOP bo failed\n", r);
sys/dev/drm/radeon/cik.c
4425
dev_warn(rdev->dev, "(%d) create HDP EOP bo failed\n", r);
sys/dev/drm/radeon/cik.c
4438
dev_warn(rdev->dev, "(%d) pin HDP EOP bo failed\n", r);
sys/dev/drm/radeon/cik.c
4444
dev_warn(rdev->dev, "(%d) map HDP EOP bo failed\n", r);
sys/dev/drm/radeon/cik.c
4596
dev_warn(rdev->dev, "(%d) create MQD bo failed\n", r);
sys/dev/drm/radeon/cik.c
4609
dev_warn(rdev->dev, "(%d) pin MQD bo failed\n", r);
sys/dev/drm/radeon/cik.c
4615
dev_warn(rdev->dev, "(%d) map MQD bo failed\n", r);
sys/dev/drm/radeon/cik.c
4993
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/cik.c
5200
dev_warn(rdev->dev, "Wait for MC idle timed out !\n");
sys/dev/drm/radeon/cik.c
5315
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/cik.c
5337
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/cik.c
7523
dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/radeon/evergreen.c
2850
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/evergreen.c
2901
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/evergreen.c
3904
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/evergreen.c
4021
dev_warn(rdev->dev, "Wait for MC idle timed out !\n");
sys/dev/drm/radeon/evergreen.c
4100
dev_warn(rdev->dev, "(%d) reserve RLC sr bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4112
dev_warn(rdev->dev, "(%d) reserve RLC c bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4124
dev_warn(rdev->dev, "(%d) reserve RLC cp table bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4159
dev_warn(rdev->dev, "(%d) create RLC sr bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4173
dev_warn(rdev->dev, "(%d) pin RLC sr bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4180
dev_warn(rdev->dev, "(%d) map RLC sr bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4238
dev_warn(rdev->dev, "(%d) create RLC c bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4252
dev_warn(rdev->dev, "(%d) pin RLC c bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4259
dev_warn(rdev->dev, "(%d) map RLC c bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4315
dev_warn(rdev->dev, "(%d) create RLC cp table bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4323
dev_warn(rdev->dev, "(%d) reserve RLC cp table bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4331
dev_warn(rdev->dev, "(%d) pin RLC cp_table bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4337
dev_warn(rdev->dev, "(%d) map RLC cp table bo failed\n", r);
sys/dev/drm/radeon/evergreen.c
4673
dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/radeon/evergreen.c
5109
dev_warn(rdev->dev, "GPU reset failed !\n");
sys/dev/drm/radeon/evergreen.c
5179
dev_warn(rdev->dev, "GPU reset failed !\n");
sys/dev/drm/radeon/evergreen_cs.c
1143
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1155
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1162
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1172
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1214
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1226
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1238
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1250
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1273
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1295
dev_warn(p->dev, "missing reloc for CP_COHER_BASE "
sys/dev/drm/radeon/evergreen_cs.c
1311
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1320
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1360
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1378
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1439
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1467
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1555
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1571
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1584
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1702
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1710
dev_warn(p->dev, "bad SET_CONFIG_REG "
sys/dev/drm/radeon/evergreen_cs.c
1716
dev_warn(p->dev, "bad SET_CONFIG_REG "
sys/dev/drm/radeon/evergreen_cs.c
1724
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1730
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/evergreen_cs.c
1740
dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
sys/dev/drm/radeon/evergreen_cs.c
1872
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
1907
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
1935
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
1947
dev_warn(p->dev, "%s:%d invalid cmd stream %d\n", __func__, __LINE__, idx);
sys/dev/drm/radeon/evergreen_cs.c
1958
dev_warn(p->dev, "%s:%d invalid cmd stream %d\n", __func__, __LINE__, idx);
sys/dev/drm/radeon/evergreen_cs.c
1969
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
1980
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
1991
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
2044
dev_warn(p->dev, "DRAW_INDIRECT buffer too small %u + %llu > %lu\n",
sys/dev/drm/radeon/evergreen_cs.c
2051
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
2063
dev_warn(p->dev, "%s:%d invalid cmd stream %d\n", __func__, __LINE__, idx);
sys/dev/drm/radeon/evergreen_cs.c
2080
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/evergreen_cs.c
213
dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d\n",
sys/dev/drm/radeon/evergreen_cs.c
2159
dev_warn(p->dev, "CP DMA src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2197
dev_warn(p->dev, "CP DMA dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
236
dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d (%d %d %d)\n",
sys/dev/drm/radeon/evergreen_cs.c
2418
dev_warn(p->dev, "vbo resource seems too big for the bo\n");
sys/dev/drm/radeon/evergreen_cs.c
244
dev_warn(p->dev, "%s:%d %s height %d invalid must be aligned with 8\n",
sys/dev/drm/radeon/evergreen_cs.c
2583
dev_warn(p->dev, "forbidden register 0x%08x at %d\n",
sys/dev/drm/radeon/evergreen_cs.c
2610
dev_warn(p->dev, "forbidden register 0x%08x at %d\n",
sys/dev/drm/radeon/evergreen_cs.c
2632
dev_warn(p->dev, "forbidden register for append cnt 0x%08x at %d\n",
sys/dev/drm/radeon/evergreen_cs.c
279
dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d\n",
sys/dev/drm/radeon/evergreen_cs.c
2847
dev_warn(p->dev, "DMA write buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
286
dev_warn(p->dev, "%s:%d %s height %d invalid must be aligned with %d\n",
sys/dev/drm/radeon/evergreen_cs.c
2872
dev_warn(p->dev, "DMA L2L, dw src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2877
dev_warn(p->dev, "DMA L2L, dw dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2912
dev_warn(p->dev, "DMA L2T, src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2917
dev_warn(p->dev, "DMA L2T, dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2931
dev_warn(p->dev, "DMA L2L, byte src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2936
dev_warn(p->dev, "DMA L2L, byte dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2975
dev_warn(p->dev, "DMA L2L, dw, broadcast src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2980
dev_warn(p->dev, "DMA L2L, dw, broadcast dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
2985
dev_warn(p->dev, "DMA L2L, dw, broadcast dst2 buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3015
dev_warn(p->dev, "DMA L2T, frame to fields src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3020
dev_warn(p->dev, "DMA L2T, frame to fields buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3025
dev_warn(p->dev, "DMA L2T, frame to fields buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3077
dev_warn(p->dev, "DMA L2T, broadcast src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3082
dev_warn(p->dev, "DMA L2T, broadcast dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3087
dev_warn(p->dev, "DMA L2T, broadcast dst2 buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
312
dev_warn(p->dev, "%s:%d %s invalid array mode %d\n",
sys/dev/drm/radeon/evergreen_cs.c
3123
dev_warn(p->dev, "DMA L2T, T2L src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3128
dev_warn(p->dev, "DMA L2T, T2L dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3164
dev_warn(p->dev, "DMA L2T, broadcast src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3169
dev_warn(p->dev, "DMA L2T, broadcast dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3174
dev_warn(p->dev, "DMA L2T, broadcast dst2 buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
3198
dev_warn(p->dev, "DMA constant fill buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/evergreen_cs.c
331
dev_warn(p->dev, "%s:%d %s invalid array mode %d\n",
sys/dev/drm/radeon/evergreen_cs.c
342
dev_warn(p->dev, "%s:%d %s invalid number of banks %d\n",
sys/dev/drm/radeon/evergreen_cs.c
352
dev_warn(p->dev, "%s:%d %s invalid bankw %d\n",
sys/dev/drm/radeon/evergreen_cs.c
362
dev_warn(p->dev, "%s:%d %s invalid bankh %d\n",
sys/dev/drm/radeon/evergreen_cs.c
372
dev_warn(p->dev, "%s:%d %s invalid macro tile aspect %d\n",
sys/dev/drm/radeon/evergreen_cs.c
385
dev_warn(p->dev, "%s:%d %s invalid tile split %d\n",
sys/dev/drm/radeon/evergreen_cs.c
415
dev_warn(p->dev, "%s:%d cb invalid format %d for %d (0x%08x)\n",
sys/dev/drm/radeon/evergreen_cs.c
428
dev_warn(p->dev, "%s:%d cb[%d] invalid (0x%08x 0x%08x 0x%08x 0x%08x)\n",
sys/dev/drm/radeon/evergreen_cs.c
437
dev_warn(p->dev, "%s:%d cb[%d] bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
477
dev_warn(p->dev, "%s:%d cb[%d] bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
482
dev_warn(p->dev, "%s:%d problematic surf: (%d %d) (%d %d %d %d %d %d %d)\n",
sys/dev/drm/radeon/evergreen_cs.c
501
dev_warn(p->dev, "%s:%d htile enabled without htile surface 0x%08x\n",
sys/dev/drm/radeon/evergreen_cs.c
538
dev_warn(p->dev, "%s:%d invalid num pipes %d\n",
sys/dev/drm/radeon/evergreen_cs.c
551
dev_warn(p->dev, "%s:%d htile surface too small %ld for %ld (%d %d)\n",
sys/dev/drm/radeon/evergreen_cs.c
582
dev_warn(p->dev, "%s:%d stencil invalid format %d\n",
sys/dev/drm/radeon/evergreen_cs.c
603
dev_warn(p->dev, "%s:%d stencil invalid (0x%08x 0x%08x 0x%08x 0x%08x)\n",
sys/dev/drm/radeon/evergreen_cs.c
612
dev_warn(p->dev, "%s:%d stencil read bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
618
dev_warn(p->dev, "%s:%d stencil read bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
623
dev_warn(p->dev, "%s:%d stencil invalid (0x%08x 0x%08x 0x%08x 0x%08x)\n",
sys/dev/drm/radeon/evergreen_cs.c
631
dev_warn(p->dev, "%s:%d stencil write bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
637
dev_warn(p->dev, "%s:%d stencil write bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
687
dev_warn(p->dev, "%s:%d depth invalid format %d\n",
sys/dev/drm/radeon/evergreen_cs.c
694
dev_warn(p->dev, "%s:%d depth invalid (0x%08x 0x%08x 0x%08x)\n",
sys/dev/drm/radeon/evergreen_cs.c
702
dev_warn(p->dev, "%s:%d depth invalid (0x%08x 0x%08x 0x%08x)\n",
sys/dev/drm/radeon/evergreen_cs.c
710
dev_warn(p->dev, "%s:%d stencil read bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
716
dev_warn(p->dev, "%s:%d depth read bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
726
dev_warn(p->dev, "%s:%d stencil write bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
732
dev_warn(p->dev, "%s:%d depth write bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
791
dev_warn(p->dev, "%s:%d texture invalid format %d\n",
sys/dev/drm/radeon/evergreen_cs.c
812
dev_warn(p->dev, "%s:%d texture invalid dimension %d\n",
sys/dev/drm/radeon/evergreen_cs.c
828
dev_warn(p->dev, "%s:%d texture invalid 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
sys/dev/drm/radeon/evergreen_cs.c
836
dev_warn(p->dev, "%s:%d texture bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
841
dev_warn(p->dev, "%s:%d mipmap bo base %ld not aligned with %ld\n",
sys/dev/drm/radeon/evergreen_cs.c
851
dev_warn(p->dev, "%s:%d texture bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
862
dev_warn(p->dev, "%s:%i got NULL MIP_ADDRESS relocation\n",
sys/dev/drm/radeon/evergreen_cs.c
893
dev_warn(p->dev, "%s:%d invalid array mode %d\n",
sys/dev/drm/radeon/evergreen_cs.c
911
dev_warn(p->dev, "%s:%d mipmap [%d] bo too small (layer size %d, "
sys/dev/drm/radeon/evergreen_cs.c
918
dev_warn(p->dev, "%s:%d problematic surf: (%d %d) (%d %d %d %d %d %d %d)\n",
sys/dev/drm/radeon/evergreen_cs.c
957
dev_warn(p->dev, "No buffer for streamout %d\n", i);
sys/dev/drm/radeon/evergreen_cs.c
979
dev_warn(p->dev, "%s:%d mask 0x%08X | 0x%08X no cb for %d\n",
sys/dev/drm/radeon/ni.c
1876
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/r100.c
3853
dev_warn(rdev->dev, "Failed to create r100_mc debugfs file.\n");
sys/dev/drm/radeon/r100.c
3878
dev_warn(rdev->dev, "Wait for MC idle timeout.\n");
sys/dev/drm/radeon/r100.c
3966
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/r100.c
4070
dev_warn(rdev->dev,
sys/dev/drm/radeon/r300.c
1448
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/r300.c
1528
dev_warn(rdev->dev,
sys/dev/drm/radeon/r420.c
314
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/r420.c
404
dev_warn(rdev->dev,
sys/dev/drm/radeon/r520.c
142
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
sys/dev/drm/radeon/r520.c
231
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/r520.c
276
dev_warn(rdev->dev,
sys/dev/drm/radeon/r600.c
1311
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/r600.c
1351
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/r600.c
1386
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/r600.c
1395
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/r600.c
1402
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/r600.c
1708
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/r600.c
1844
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/r600.c
4066
dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
sys/dev/drm/radeon/r600_cs.c
1019
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1037
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1079
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1102
dev_warn(p->dev, "missing reloc for CP_COHER_BASE "
sys/dev/drm/radeon/r600_cs.c
1276
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1291
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1304
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1374
dev_warn(p->dev, "bad SET_CONTEXT_REG "
sys/dev/drm/radeon/r600_cs.c
1383
dev_warn(p->dev, "bad SET_CONFIG_REG "
sys/dev/drm/radeon/r600_cs.c
1393
dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
sys/dev/drm/radeon/r600_cs.c
1546
dev_warn(p->dev, "this kernel doesn't support %d texture dim\n", G_038000_DIM(word0));
sys/dev/drm/radeon/r600_cs.c
1550
dev_warn(p->dev, "%s:%d texture invalid format %d\n",
sys/dev/drm/radeon/r600_cs.c
1557
dev_warn(p->dev, "%s:%d tex array mode (%d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
1565
dev_warn(p->dev, "%s:%d tex pitch (%d, 0x%x, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
1570
dev_warn(p->dev, "%s:%d tex base offset (0x%llx, 0x%llx, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
1575
dev_warn(p->dev, "%s:%d tex mip offset (0x%llx, 0x%llx, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
1581
dev_warn(p->dev, "texture blevel %d > llevel %d\n",
sys/dev/drm/radeon/r600_cs.c
1595
dev_warn(p->dev, "texture bo too small ((%d %d) (%d %d) %d %d %d -> %d have %ld)\n",
sys/dev/drm/radeon/r600_cs.c
1599
dev_warn(p->dev, "alignments %d %d %d %lld\n", pitch, pitch_align, height_align, base_align);
sys/dev/drm/radeon/r600_cs.c
1616
dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
sys/dev/drm/radeon/r600_cs.c
1622
dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
sys/dev/drm/radeon/r600_cs.c
1723
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/r600_cs.c
1735
dev_warn(p->dev, "%s:%d invalid cmd stream %d\n", __func__, __LINE__, idx);
sys/dev/drm/radeon/r600_cs.c
1747
dev_warn(p->dev, "%s:%d invalid cmd stream\n", __func__, __LINE__);
sys/dev/drm/radeon/r600_cs.c
1809
dev_warn(p->dev, "CP DMA src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/r600_cs.c
1839
dev_warn(p->dev, "CP DMA dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/r600_cs.c
2004
dev_warn(p->dev, "vbo resource seems too big (%d) for the bo (%ld)\n",
sys/dev/drm/radeon/r600_cs.c
2422
dev_warn(p->dev, "DMA write buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/r600_cs.c
2489
dev_warn(p->dev, "DMA copy src buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/r600_cs.c
2494
dev_warn(p->dev, "DMA write dst buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/r600_cs.c
2512
dev_warn(p->dev, "DMA constant fill buffer too small (%llu %lu)\n",
sys/dev/drm/radeon/r600_cs.c
366
dev_warn(p->dev, "%s:%d cb invalid format %d for %d (0x%08X)\n",
sys/dev/drm/radeon/r600_cs.c
389
dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__,
sys/dev/drm/radeon/r600_cs.c
407
dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__,
sys/dev/drm/radeon/r600_cs.c
414
dev_warn(p->dev, "%s:%d cb pitch (%d, 0x%x, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
419
dev_warn(p->dev, "%s:%d cb height (%d, 0x%x, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
424
dev_warn(p->dev, "%s offset[%d] 0x%llx 0x%llx, %d not aligned\n", __func__, i,
sys/dev/drm/radeon/r600_cs.c
452
dev_warn(p->dev, "%s offset[%d] %d %llu %d %lu too big (%d %d) (%d %d %d)\n",
sys/dev/drm/radeon/r600_cs.c
483
dev_warn(p->dev, "%s FMASK_TILE_MAX too large "
sys/dev/drm/radeon/r600_cs.c
501
dev_warn(p->dev, "%s CMASK_BLOCK_MAX too large "
sys/dev/drm/radeon/r600_cs.c
511
dev_warn(p->dev, "%s invalid tile mode\n", __func__);
sys/dev/drm/radeon/r600_cs.c
531
dev_warn(p->dev, "z/stencil with no depth buffer\n");
sys/dev/drm/radeon/r600_cs.c
549
dev_warn(p->dev, "z/stencil with invalid format %d\n", G_028010_FORMAT(track->db_depth_info));
sys/dev/drm/radeon/r600_cs.c
554
dev_warn(p->dev, "z/stencil buffer size not set\n");
sys/dev/drm/radeon/r600_cs.c
560
dev_warn(p->dev, "z/stencil buffer too small (0x%08X %d %d %ld)\n",
sys/dev/drm/radeon/r600_cs.c
585
dev_warn(p->dev, "%s invalid tiling %d (0x%08X)\n", __func__,
sys/dev/drm/radeon/r600_cs.c
598
dev_warn(p->dev, "%s invalid tiling %d (0x%08X)\n", __func__,
sys/dev/drm/radeon/r600_cs.c
605
dev_warn(p->dev, "%s:%d db pitch (%d, 0x%x, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
610
dev_warn(p->dev, "%s:%d db height (%d, 0x%x, %d) invalid\n",
sys/dev/drm/radeon/r600_cs.c
615
dev_warn(p->dev, "%s offset 0x%llx, 0x%llx, %d not aligned\n", __func__,
sys/dev/drm/radeon/r600_cs.c
624
dev_warn(p->dev, "z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu)\n",
sys/dev/drm/radeon/r600_cs.c
638
dev_warn(p->dev, "%s:%d htile enabled without htile surface 0x%08x\n",
sys/dev/drm/radeon/r600_cs.c
643
dev_warn(p->dev, "%s:%d htile can't be enabled with bogus db_depth_size 0x%08x\n",
sys/dev/drm/radeon/r600_cs.c
682
dev_warn(p->dev, "%s:%d invalid num pipes %d\n",
sys/dev/drm/radeon/r600_cs.c
695
dev_warn(p->dev, "%s:%d htile surface too small %ld for %ld (%d %d)\n",
sys/dev/drm/radeon/r600_cs.c
730
dev_warn(p->dev, "No buffer for streamout %d\n", i);
sys/dev/drm/radeon/r600_cs.c
759
dev_warn(p->dev, "%s:%d mask 0x%08X | 0x%08X no cb for %d\n",
sys/dev/drm/radeon/r600_cs.c
978
dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
sys/dev/drm/radeon/radeon_agp.c
154
dev_warn(rdev->dev, "AGP aperture too small (%juM) "
sys/dev/drm/radeon/radeon_agp.c
268
dev_warn(rdev->dev, "radeon AGP reinit failed\n");
sys/dev/drm/radeon/radeon_device.c
1119
dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n",
sys/dev/drm/radeon/radeon_device.c
1129
dev_warn(rdev->dev, "gart size (%d) too small\n",
sys/dev/drm/radeon/radeon_device.c
1133
dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n",
sys/dev/drm/radeon/radeon_device.c
1149
dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: "
sys/dev/drm/radeon/radeon_device.c
1156
dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n",
sys/dev/drm/radeon/radeon_device.c
1162
dev_warn(rdev->dev, "VM size (%d) too small, min is 1GB\n",
sys/dev/drm/radeon/radeon_device.c
1171
dev_warn(rdev->dev, "VM size (%d) too large, max is 1TB\n",
sys/dev/drm/radeon/radeon_device.c
1192
dev_warn(rdev->dev, "VM page table size (%d) too small\n",
sys/dev/drm/radeon/radeon_device.c
1199
dev_warn(rdev->dev, "VM page table size (%d) too large\n",
sys/dev/drm/radeon/radeon_device.c
461
dev_warn(rdev->dev, "(%d) create WB bo failed\n", r);
sys/dev/drm/radeon/radeon_device.c
473
dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r);
sys/dev/drm/radeon/radeon_device.c
481
dev_warn(rdev->dev, "(%d) map WB bo failed\n", r);
sys/dev/drm/radeon/radeon_device.c
567
dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n");
sys/dev/drm/radeon/radeon_device.c
573
dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n");
sys/dev/drm/radeon/radeon_device.c
605
dev_warn(rdev->dev, "limiting GTT\n");
sys/dev/drm/radeon/radeon_device.c
611
dev_warn(rdev->dev, "limiting GTT\n");
sys/dev/drm/radeon/radeon_fence.c
300
dev_warn(rdev->dev, "GPU lockup (current fence id "
sys/dev/drm/radeon/radeon_object.c
396
dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
sys/dev/drm/radeon/rs400.c
392
dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n");
sys/dev/drm/radeon/rs400.c
466
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/rs400.c
539
dev_warn(rdev->dev,
sys/dev/drm/radeon/rs600.c
1043
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/rs600.c
1117
dev_warn(rdev->dev,
sys/dev/drm/radeon/rs600.c
864
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
sys/dev/drm/radeon/rs600.c
960
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
sys/dev/drm/radeon/rs690.c
681
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
sys/dev/drm/radeon/rs690.c
759
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/rs690.c
834
dev_warn(rdev->dev,
sys/dev/drm/radeon/rv515.c
473
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
sys/dev/drm/radeon/rv515.c
575
dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
sys/dev/drm/radeon/rv515.c
654
dev_warn(rdev->dev,
sys/dev/drm/radeon/rv770.c
1022
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/rv770.c
1064
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/rv770.c
1605
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/rv770.c
1614
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/rv770.c
1621
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/si.c
3885
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/si.c
4054
dev_warn(rdev->dev, "Wait for MC idle timed out !\n");
sys/dev/drm/radeon/si.c
4145
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/si.c
4168
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
sys/dev/drm/radeon/si.c
4183
dev_warn(rdev->dev, "limiting VRAM\n");
sys/dev/drm/radeon/si.c
6211
dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",