crypto/openssh/readconf.c

2866

#define ASSEMBLE(what, defaults, all) \

crypto/openssh/readconf.c

2869

defaults, all)) != 0) { \

crypto/openssh/servconf.c

243

#define ASSEMBLE(what, defaults, all) \

crypto/openssh/servconf.c

245

if ((r = kex_assemble_names(&o->what, defaults, all)) != 0) \

lib/libc/net/nsdispatch.c

603

const char *method_name, const ns_src defaults[], ...)

lib/libc/net/nsdispatch.c

646

srclist = defaults;

lib/libc/net/nsdispatch.c

675

va_start(ap, defaults);

lib/libc/net/nsdispatch.c

688

va_start(ap, defaults);

lib/libc/net/nsdispatch.c

693

va_start(ap, defaults);

lib/libc/net/nsdispatch.c

703

va_start(ap, defaults);

lib/libc/net/nsdispatch.c

718

va_start(ap, defaults);

lib/libc/resolv/res_debug.c

957

goto defaults;

lib/libc/resolv/res_debug.c

968

goto defaults;

lib/libc/resolv/res_debug.c

979

goto defaults;

lib/libc/resolv/res_debug.c

983

defaults:

sbin/dhclient/clparse.c

167

code = parse_option_decl(cfile, &config->defaults[0]);

sbin/dhclient/clparse.c

172

code = parse_option_decl(cfile, &config->defaults[0]);

sbin/dhclient/clparse.c

182

code = parse_option_decl(cfile, &config->defaults[0]);

sbin/dhclient/clparse.c

187

code = parse_option_decl(cfile, &config->defaults[0]);

sbin/dhclient/dhclient.c

1618

else if (config->defaults[i].len)

sbin/dhclient/dhclient.c

1620

pretty_print_option(i, &config->defaults[i],

sbin/dhclient/dhclient.c

1625

if (config->defaults[i].len)

sbin/dhclient/dhclient.c

1627

pretty_print_option(i, &config->defaults[i],

sbin/dhclient/dhclient.c

1632

o.len = config->defaults[i].len + lease->options[i].len;

sbin/dhclient/dhclient.c

1637

config->defaults[i].data,

sbin/dhclient/dhclient.c

1639

memcpy(o.data, config->defaults[i].data,

sbin/dhclient/dhclient.c

1640

config->defaults[i].len);

sbin/dhclient/dhclient.c

1641

memcpy(o.data + config->defaults[i].len,

sbin/dhclient/dhclient.c

1651

o.len = config->defaults[i].len + lease->options[i].len;

sbin/dhclient/dhclient.c

1656

config->defaults[i].data,

sbin/dhclient/dhclient.c

1661

config->defaults[i].data,

sbin/dhclient/dhclient.c

1662

config->defaults[i].len);

sbin/dhclient/dhcpd.h

129

struct option_data defaults[256];

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

514

const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

516

smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

517

smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

528

const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

534

defaults->tdc_vddc_throttle_release_limit_perc;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

535

smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

543

const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

554

smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

717

const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

731

dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

744

dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

745

def1 = defaults->bapmti_r;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

746

def2 = defaults->bapmti_rc;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

490

const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

516

dpm_table->DTEAmbientTempBase = defaults->DTEAmbientTempBase;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

573

const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

575

smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

576

smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

590

const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

599

defaults->TDC_VDDC_ThrottleReleaseLimitPerc;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

600

smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

608

const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

619

smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1853

const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1875

dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1889

dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1890

def1 = defaults->bapmti_r;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1891

def2 = defaults->bapmti_rc;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

309

const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

311

smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

312

smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

323

const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

329

defaults->tdc_vddc_throttle_release_limit_perc;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

330

smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

338

const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

349

smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

427

const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

454

pdef1 = defaults->BAPMTI_R;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

455

pdef2 = defaults->BAPMTI_RC;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

474

const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

476

smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

477

smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

490

const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

496

defaults->TDC_VDDC_ThrottleReleaseLimitPerc;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

497

smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

505

const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

516

smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1830

const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1850

dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1853

PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1854

pdef1 = defaults->bapmti_r;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1855

pdef2 = defaults->bapmti_rc;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1877

const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1879

smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1880

smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddC;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1892

const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1903

defaults->tdc_vddc_throttle_release_limit_perc;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1904

smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1913

const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1925

smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1447

const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1474

pdef1 = defaults->BAPMTI_R;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1475

pdef2 = defaults->BAPMTI_RC;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1741

const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1743

smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1744

smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1757

const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1763

defaults->TDC_VDDC_ThrottleReleaseLimitPerc;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1764

smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1772

const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1783

smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;

sys/dev/drm/i915/intel_lrc.c

2786

void *defaults;

sys/dev/drm/i915/intel_lrc.c

2788

defaults = i915_gem_object_pin_map(engine->default_state,

sys/dev/drm/i915/intel_lrc.c

2790

if (IS_ERR(defaults)) {

sys/dev/drm/i915/intel_lrc.c

2791

ret = PTR_ERR(defaults);

sys/dev/drm/i915/intel_lrc.c

2795

memcpy(vaddr + start, defaults + start, engine->context_size);

sys/dev/drm/i915/intel_ringbuffer.c

1323

void *defaults, *vaddr;

sys/dev/drm/i915/intel_ringbuffer.c

1331

defaults = i915_gem_object_pin_map(engine->default_state,

sys/dev/drm/i915/intel_ringbuffer.c

1333

if (IS_ERR(defaults)) {

sys/dev/drm/i915/intel_ringbuffer.c

1334

err = PTR_ERR(defaults);

sys/dev/drm/i915/intel_ringbuffer.c

1338

memcpy(vaddr, defaults, engine->context_size);

sys/kern/kern_jail.c

72

SYSCTL_NODE(_jail, OID_AUTO, defaults, CTLFLAG_RW, 0,

tools/tools/net80211/w00t/libw00t/w00t.c

153

static struct ieee80211_bpf_params defaults = {

tools/tools/net80211/w00t/libw00t/w00t.c

167

params = &defaults;

usr.bin/whereis/whereis.c

371

defaults();

usr.bin/whereis/whereis.c

68

static void defaults(void);