sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
298
&amdgpu_connector->ddc_bus->aux.ddc);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
307
&amdgpu_connector->ddc_bus->aux.ddc);
sys/dev/drm/amd/amdgpu/amdgpu_display.c
466
ret = i2c_transfer(&amdgpu_connector->ddc_bus->aux.ddc, msgs, 2);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4073
i2c = create_i2c(link->ddc, link->link_index, &res);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
563
struct i2c_adapter *ddc;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
569
ddc = &aconnector->dm_dp_aux.aux.ddc;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
571
ddc = &aconnector->i2c->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
578
edid = drm_get_edid(&aconnector->base, ddc);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
434
aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
sys/dev/drm/amd/display/dc/core/dc.c
1743
struct ddc_service *ddc = link->ddc;
sys/dev/drm/amd/display/dc/core/dc.c
1746
ddc->ddc_pin,
sys/dev/drm/amd/display/dc/core/dc_link.c
1163
link->ddc = dal_ddc_service_create(&ddc_service_init_data);
sys/dev/drm/amd/display/dc/core/dc_link.c
1165
if (link->ddc == NULL) {
sys/dev/drm/amd/display/dc/core/dc_link.c
1172
dal_ddc_service_get_ddc_pin(link->ddc));
sys/dev/drm/amd/display/dc/core/dc_link.c
1251
dal_ddc_service_destroy(&link->ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
1642
pipe_ctx->stream->sink->link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
1695
pipe_ctx->stream->sink->link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
1955
stream->sink->link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
1974
dal_ddc_service_read_scdc_data(link->ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
339
struct ddc *ddc;
sys/dev/drm/amd/display/dc/core/dc_link.c
348
ddc = dal_ddc_service_get_ddc_pin(link->ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
350
if (!ddc) {
sys/dev/drm/amd/display/dc/core/dc_link.c
361
ddc, GPIO_MODE_INPUT, GPIO_DDC_CONFIG_TYPE_MODE_I2C)) {
sys/dev/drm/amd/display/dc/core/dc_link.c
362
dal_gpio_destroy_ddc(&ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
376
gpio_result = dal_gpio_get_value(ddc->pin_clock, &clock_pin);
sys/dev/drm/amd/display/dc/core/dc_link.c
386
dal_ddc_close(ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
481
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
486
ddc, sink_cap);
sys/dev/drm/amd/display/dc/core/dc_link.c
531
link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
591
sink_caps->signal = dp_passive_dongle_detection(link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
746
link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link.c
750
link->ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
83
if (link->ddc)
sys/dev/drm/amd/display/dc/core/dc_link.c
84
dal_ddc_service_destroy(&link->ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
966
struct ddc *ddc;
sys/dev/drm/amd/display/dc/core/dc_link.c
969
ddc = dal_ddc_service_get_ddc_pin(link->ddc);
sys/dev/drm/amd/display/dc/core/dc_link.c
971
if (ddc) {
sys/dev/drm/amd/display/dc/core/dc_link.c
972
switch (dal_ddc_get_line(ddc)) {
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
304
static void destruct(struct ddc_service *ddc)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
306
if (ddc->ddc_pin)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
307
dal_gpio_destroy_ddc(&ddc->ddc_pin);
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
310
void dal_ddc_service_destroy(struct ddc_service **ddc)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
312
if (!ddc || !*ddc) {
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
316
destruct(*ddc);
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
317
kfree(*ddc);
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
318
*ddc = NULL;
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
321
enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
327
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
330
ddc->transaction_type = type;
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
333
bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
335
switch (ddc->transaction_type) {
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
346
void ddc_service_set_dongle_type(struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
349
ddc->dongle_type = dongle_type;
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
353
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
356
struct dc_link *link = ddc->link;
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
370
uint32_t get_defer_delay(struct ddc_service *ddc)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
374
switch (ddc->transaction_type) {
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
376
if ((DISPLAY_DONGLE_DP_VGA_CONVERTER == ddc->dongle_type) ||
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
377
(DISPLAY_DONGLE_DP_DVI_CONVERTER == ddc->dongle_type) ||
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
379
ddc->dongle_type)) {
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
384
defer_delay_converter_wa(ddc, defer_delay);
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
399
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
421
.speed = ddc->ctx->dc->caps.i2c_speed_in_khz };
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
424
ddc->ctx,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
425
ddc->link,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
430
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
446
ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
453
CONN_DATA_DETECT(ddc->link, type2_dongle_buf, sizeof(type2_dongle_buf),
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
499
CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
507
CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
514
CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
530
CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
537
CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
553
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
562
dal_ddc_service_is_in_aux_transaction_mode(ddc) ?
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
578
if (dal_ddc_service_is_in_aux_transaction_mode(ddc)) {
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
581
dal_ddc_aux_payloads_create(ddc->ctx, payloads_num);
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
586
.defer_delay = get_defer_delay(ddc),
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
599
ddc->ctx->i2caux,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
600
ddc->ddc_pin,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
607
dal_ddc_i2c_payloads_create(ddc->ctx, payloads_num);
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
613
.speed = ddc->ctx->dc->caps.i2c_speed_in_khz };
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
625
ddc->ctx,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
626
ddc->link,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
635
int dc_link_aux_transfer(struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
643
struct ddc *ddc_pin = ddc->ddc_pin;
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
655
aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en];
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
691
struct ddc *ddc)
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
693
ddc_service->ddc_pin = ddc;
sys/dev/drm/amd/display/dc/core/dc_link_ddc.c
696
struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service)
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
2179
ddc_service_set_dongle_type(link->ddc,
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
2251
ddc_service_set_dongle_type(link->ddc, link->dpcd_caps.dongle_type);
sys/dev/drm/amd/display/dc/dc_ddc_types.h
161
struct ddc *ddc_pin;
sys/dev/drm/amd/display/dc/dc_link.h
98
struct ddc_service *ddc;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
58
dal_ddc_close(engine->ddc);
sys/dev/drm/amd/display/dc/dce/dce_aux.c
60
engine->ddc = NULL;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
872
struct ddc *ddc)
sys/dev/drm/amd/display/dc/dce/dce_aux.c
883
result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
sys/dev/drm/amd/display/dc/dce/dce_aux.c
890
dal_ddc_close(ddc);
sys/dev/drm/amd/display/dc/dce/dce_aux.c
894
engine->ddc = ddc;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
928
aux_engine110->base.ddc = NULL;
sys/dev/drm/amd/display/dc/dce/dce_aux.h
110
struct ddc *ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c.c
30
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c.c
36
if (!ddc) {
sys/dev/drm/amd/display/dc/dce/dce_i2c.c
47
dce_i2c_sw = dce_i2c_acquire_i2c_sw_engine(pool, ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c.c
50
dce_i2c_hw = acquire_i2c_hw_engine(pool, ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c.c
55
return dce_i2c_submit_command_hw(pool, ddc, cmd, dce_i2c_hw);
sys/dev/drm/amd/display/dc/dce/dce_i2c.c
58
return dce_i2c_submit_command_sw(pool, ddc, cmd, dce_i2c_sw);
sys/dev/drm/amd/display/dc/dce/dce_i2c.h
35
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
352
struct ddc *ddc)
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
359
if (!ddc)
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
362
if (ddc->hw_info.hw_supported) {
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
363
enum gpio_ddc_line line = dal_ddc_get_line(ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
376
result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
392
dce_i2c_hw->ddc = ddc;
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
550
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
580
dal_ddc_close(dce_i2c_hw->ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
582
dce_i2c_hw->ddc = NULL;
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h
240
struct ddc *ddc;
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h
293
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h
299
struct ddc *ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
100
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
109
if (read_bit_from_ddc(ddc, SCL))
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
121
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
178
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
238
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
275
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
297
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
322
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
382
struct ddc *ddc)
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
386
result = dal_ddc_open(ddc, GPIO_MODE_FAST_OUTPUT,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
39
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
392
engine->ddc = ddc;
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
399
struct ddc *ddc_handle)
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
429
struct ddc *ddc = engine->ddc;
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
434
bool result = start_sync_sw(engine->ctx, ddc, clock_delay_div_4);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
442
result = i2c_write_sw(engine->ctx, ddc, clock_delay_div_4,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
447
result = i2c_read_sw(engine->ctx, ddc, clock_delay_div_4,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
45
dal_gpio_get_value(ddc->pin_data, &value);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
461
if (!stop_sync_sw(engine->ctx, ddc, clock_delay_div_4))
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
47
dal_gpio_get_value(ddc->pin_clock, &value);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
499
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
53
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
530
struct ddc *ddc)
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
535
if (get_hw_supported_ddc_line(ddc, &line))
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
541
if (!dce_i2c_engine_acquire_sw(engine, ddc))
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
60
dal_gpio_set_value(ddc->pin_data, value);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
62
dal_gpio_set_value(ddc->pin_clock, value);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
69
dal_ddc_close(dce_i2c_sw->ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
70
dce_i2c_sw->ddc = NULL;
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
74
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
81
if (!ddc) {
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
86
if (!ddc->hw_info.hw_supported)
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
89
line_found = dal_ddc_get_line(ddc);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.h
36
struct ddc *ddc;
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.h
48
struct ddc *ddc,
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.h
54
struct ddc *ddc);
sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
2521
stream->sink->link->ddc->dongle_type;
sys/dev/drm/amd/display/dc/dm_event_log.h
34
#define EVENT_LOG_AUX_REQ(ddc, type, action, address, len, data)
sys/dev/drm/amd/display/dc/dm_event_log.h
35
#define EVENT_LOG_AUX_REP(ddc, type, replyStatus, len, data)
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
114
struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
118
ddc->regs = &ddc_data_regs[en];
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
119
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
122
ddc->regs = &ddc_clk_regs[en];
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
123
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
130
ddc->shifts = &ddc_shift;
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
131
ddc->masks = &ddc_mask;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
133
struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
137
ddc->regs = &ddc_data_regs[en];
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
138
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
141
ddc->regs = &ddc_clk_regs[en];
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
142
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
149
ddc->shifts = &ddc_shift;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
150
ddc->masks = &ddc_mask;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
118
struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
122
ddc->regs = &ddc_data_regs[en];
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
123
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
126
ddc->regs = &ddc_clk_regs[en];
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
127
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
134
ddc->shifts = &ddc_shift;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
135
ddc->masks = &ddc_mask;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
128
struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
132
ddc->regs = &ddc_data_regs[en];
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
133
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
136
ddc->regs = &ddc_clk_regs[en];
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
137
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
144
ddc->shifts = &ddc_shift;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
145
ddc->masks = &ddc_mask;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
408
struct ddc *dal_gpio_create_ddc(
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
416
struct ddc *ddc;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
421
ddc = kzalloc(sizeof(struct ddc), GFP_KERNEL);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
423
if (!ddc) {
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
428
ddc->pin_data = dal_gpio_create(
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
431
if (!ddc->pin_data) {
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
436
ddc->pin_clock = dal_gpio_create(
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
439
if (!ddc->pin_clock) {
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
444
ddc->hw_info = *info;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
446
ddc->ctx = service->ctx;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
448
return ddc;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
451
dal_gpio_destroy(&ddc->pin_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
454
kfree(ddc);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
460
struct ddc **ddc)
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
462
if (!ddc || !*ddc) {
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
467
dal_ddc_close(*ddc);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
468
dal_gpio_destroy(&(*ddc)->pin_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
469
dal_gpio_destroy(&(*ddc)->pin_clock);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
470
kfree(*ddc);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
472
*ddc = NULL;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
476
struct ddc *ddc,
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
486
result = dal_gpio_open_ex(ddc->pin_data, mode);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
493
result = dal_gpio_open_ex(ddc->pin_clock, mode);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
511
config_data.config.ddc.type = config_type;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
513
hw_data = FROM_HW_GPIO_PIN(ddc->pin_data->pin);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
514
hw_clock = FROM_HW_GPIO_PIN(ddc->pin_clock->pin);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
516
config_data.config.ddc.data_en_bit_present = hw_data->store.en != 0;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
517
config_data.config.ddc.clock_en_bit_present = hw_clock->store.en != 0;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
519
result = dal_gpio_set_config(ddc->pin_data, &config_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
526
dal_gpio_close(ddc->pin_clock);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
529
dal_gpio_close(ddc->pin_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
535
struct ddc *ddc,
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
541
dal_gpio_get_mode(ddc->pin_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
543
result = dal_gpio_change_mode(ddc->pin_data, mode);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
553
result = dal_gpio_change_mode(ddc->pin_clock, mode);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
558
dal_gpio_change_mode(ddc->pin_clock, original_mode);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
561
dal_gpio_change_mode(ddc->pin_data, original_mode);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
567
const struct ddc *ddc)
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
569
return (enum gpio_ddc_line)dal_gpio_get_enum(ddc->pin_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
573
struct ddc *ddc,
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
580
config_data.config.ddc.type = config_type;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
581
config_data.config.ddc.data_en_bit_present = false;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
582
config_data.config.ddc.clock_en_bit_present = false;
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
584
return dal_gpio_set_config(ddc->pin_data, &config_data);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
588
struct ddc *ddc)
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
590
dal_gpio_close(ddc->pin_clock);
sys/dev/drm/amd/display/dc/gpio/gpio_service.c
591
dal_gpio_close(ddc->pin_data);
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
134
if (config_data->config.ddc.data_en_bit_present ||
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
135
config_data->config.ddc.clock_en_bit_present)
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
203
struct hw_ddc *ddc,
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
208
dal_hw_gpio_construct(&ddc->base, id, en, ctx);
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
209
ddc->base.base.funcs = &funcs;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
38
ddc->shifts->field_name, ddc->masks->field_name
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
41
ddc->base.base.ctx
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
43
(ddc->regs->reg)
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
67
struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr);
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
74
hw_gpio = &ddc->base;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
86
switch (config_data->config.ddc.type) {
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
70
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
82
result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
89
dal_ddc_close(ddc);
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
93
engine->ddc = ddc;
sys/dev/drm/amd/display/dc/i2caux/aux_engine.h
82
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
277
EVENT_LOG_AUX_REQ(engine->base.ddc->pin_data->en, EVENT_LOG_AUX_ORIGIN_NATIVE,
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
343
EVENT_LOG_AUX_REP(engine->base.ddc->pin_data->en,
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
98
struct ddc *ddc_handle)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
106
engine->base.funcs->acquire(&engine->base, ddc)) {
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
81
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
92
if (!ddc)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
95
if (ddc->hw_info.hw_supported) {
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
96
enum gpio_ddc_line line = dal_ddc_get_line(ddc);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
115
struct ddc *ddc_handle)
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
111
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
118
if (!ddc)
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
121
if (ddc->hw_info.hw_supported) {
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
122
enum gpio_ddc_line line = dal_ddc_get_line(ddc);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
140
engine->base.funcs->acquire(&engine->base, ddc)) {
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
145
if (engine->base.funcs->acquire(&engine->base, ddc))
sys/dev/drm/amd/display/dc/i2caux/engine.h
100
struct ddc *ddc;
sys/dev/drm/amd/display/dc/i2caux/engine.h
88
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/engine_base.c
43
engine->ddc = NULL;
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.c
53
struct ddc *ddc_handle)
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.h
113
struct ddc *ddc_handle);
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.h
71
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
185
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
190
result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
196
engine->base.ddc = ddc;
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.h
70
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
107
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
150
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
187
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
243
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
302
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
324
struct ddc *ddc_handle,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
464
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
468
result = dal_ddc_open(ddc, GPIO_MODE_FAST_OUTPUT,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
474
engine->base.ddc = ddc;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
485
struct ddc *ddc = engine->base.ddc;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
490
bool result = start_sync(engine->base.ctx, ddc, clock_delay_div_4);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
498
result = i2c_write(engine->base.ctx, ddc, clock_delay_div_4,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
503
result = i2c_read(engine->base.ctx, ddc, clock_delay_div_4,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
517
if (!stop_sync(engine->base.ctx, ddc, clock_delay_div_4))
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
53
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
59
dal_gpio_get_value(ddc->pin_data, &value);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
61
dal_gpio_get_value(ddc->pin_clock, &value);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
67
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
74
dal_gpio_set_value(ddc->pin_data, value);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
76
dal_gpio_set_value(ddc->pin_clock, value);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
81
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
94
if (read_bit_from_ddc(ddc, SCL))
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.h
57
struct ddc *ddc_handle);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
111
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
118
if (!ddc) {
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
140
engine = i2caux->funcs->acquire_i2c_sw_engine(i2caux, ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
144
i2caux, ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
150
engine = i2caux->funcs->acquire_i2c_hw_engine(i2caux, ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
154
i2caux, ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
198
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
206
if (!ddc) {
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
216
engine = i2caux->funcs->acquire_aux_engine(i2caux, ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
270
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
277
if (!ddc) {
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
282
if (!ddc->hw_info.hw_supported)
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
285
line_found = dal_ddc_get_line(ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
297
struct ddc *ddc,
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
301
i2caux->funcs->acquire_aux_engine(i2caux, ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
379
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
384
if (get_hw_supported_ddc_line(ddc, &line))
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
393
if (!engine->base.funcs->acquire(&engine->base, ddc))
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
401
struct ddc *ddc)
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
406
if (!get_hw_supported_ddc_line(ddc, &line))
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
414
if (!engine->base.funcs->acquire(&engine->base, ddc))
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
426
dal_ddc_close(engine->ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
428
engine->ddc = NULL;
sys/dev/drm/amd/display/dc/i2caux/i2caux.h
118
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.h
122
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.h
40
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.h
43
struct ddc *ddc);
sys/dev/drm/amd/display/dc/i2caux/i2caux.h
46
struct ddc *ddc);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
105
int dc_link_aux_transfer(struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
121
void ddc_service_set_dongle_type(struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
126
struct ddc *ddc);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
128
struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
130
uint32_t get_defer_delay(struct ddc_service *ddc);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
83
void dal_ddc_service_destroy(struct ddc_service **ddc);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
85
enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
88
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
91
bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc);
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
94
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/inc/dc_link_ddc.h
98
struct ddc_service *ddc,
sys/dev/drm/amd/display/dc/inc/hw/aux_engine.h
170
struct ddc *ddc);
sys/dev/drm/amd/display/dc/inc/hw/aux_engine.h
86
struct ddc *ddc;
sys/dev/drm/amd/display/include/gpio_service_interface.h
103
struct ddc *ddc);
sys/dev/drm/amd/display/include/gpio_service_interface.h
54
struct ddc *dal_gpio_create_ddc(
sys/dev/drm/amd/display/include/gpio_service_interface.h
62
struct ddc **ddc);
sys/dev/drm/amd/display/include/gpio_service_interface.h
87
struct ddc *ddc,
sys/dev/drm/amd/display/include/gpio_service_interface.h
92
struct ddc *ddc,
sys/dev/drm/amd/display/include/gpio_service_interface.h
96
const struct ddc *ddc);
sys/dev/drm/amd/display/include/gpio_service_interface.h
99
struct ddc *ddc,
sys/dev/drm/amd/display/include/gpio_types.h
325
struct gpio_ddc_config ddc;
sys/dev/drm/amd/display/include/i2caux_interface.h
76
struct ddc *ddc,
sys/dev/drm/amd/display/include/i2caux_interface.h
81
struct ddc *ddc,
sys/dev/drm/amd/display/include/i2caux_interface.h
86
struct ddc *ddc,
sys/dev/drm/amd/display/include/link_service_types.h
34
struct ddc;
sys/dev/drm/drm_dp_helper.c
1009
return container_of(i2c, struct drm_dp_aux, ddc);
sys/dev/drm/drm_dp_helper.c
1120
aux->ddc.algo = &drm_dp_i2c_algo;
sys/dev/drm/drm_dp_helper.c
1121
aux->ddc.algo_data = aux;
sys/dev/drm/drm_dp_helper.c
1122
aux->ddc.retries = 3;
sys/dev/drm/drm_dp_helper.c
1124
aux->ddc.lock_ops = &drm_dp_i2c_lock_ops;
sys/dev/drm/drm_dp_helper.c
1140
if (!aux->ddc.algo)
sys/dev/drm/drm_dp_helper.c
1144
aux->ddc.class = I2C_CLASS_DDC;
sys/dev/drm/drm_dp_helper.c
1145
aux->ddc.owner = THIS_MODULE;
sys/dev/drm/drm_dp_helper.c
1147
aux->ddc.dev.parent = aux->dev;
sys/dev/drm/drm_dp_helper.c
1149
strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
sys/dev/drm/drm_dp_helper.c
1150
sizeof(aux->ddc.name));
sys/dev/drm/drm_dp_helper.c
1156
ret = i2c_add_adapter(&aux->ddc);
sys/dev/drm/drm_dp_helper.c
1173
i2c_del_adapter(&aux->ddc);
sys/dev/drm/drm_dp_mst_topology.c
1218
port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc);
sys/dev/drm/drm_dp_mst_topology.c
2508
port->cached_edid = drm_get_edid(connector, &port->aux.ddc);
sys/dev/drm/drm_dp_mst_topology.c
2565
edid = drm_get_edid(connector, &port->aux.ddc);
sys/dev/drm/drm_dp_mst_topology.c
3364
aux->ddc.algo = &drm_dp_mst_i2c_algo;
sys/dev/drm/drm_dp_mst_topology.c
3365
aux->ddc.algo_data = aux;
sys/dev/drm/drm_dp_mst_topology.c
3366
aux->ddc.retries = 3;
sys/dev/drm/drm_dp_mst_topology.c
3369
aux->ddc.class = I2C_CLASS_DDC;
sys/dev/drm/drm_dp_mst_topology.c
3370
aux->ddc.owner = THIS_MODULE;
sys/dev/drm/drm_dp_mst_topology.c
3372
aux->ddc.dev.parent = aux->dev;
sys/dev/drm/drm_dp_mst_topology.c
3374
aux->ddc.dev.of_node = aux->dev->of_node;
sys/dev/drm/drm_dp_mst_topology.c
3377
strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
sys/dev/drm/drm_dp_mst_topology.c
3378
sizeof(aux->ddc.name));
sys/dev/drm/drm_dp_mst_topology.c
3380
return i2c_add_adapter(&aux->ddc);
sys/dev/drm/drm_dp_mst_topology.c
3389
i2c_del_adapter(&aux->ddc);
sys/dev/drm/i915/intel_dp.c
4575
if (drm_probe_ddc(&intel_dp->aux.ddc))
sys/dev/drm/i915/intel_dp.c
5019
&intel_dp->aux.ddc);
sys/dev/drm/i915/intel_dp.c
6460
edid = drm_get_edid(connector, &intel_dp->aux.ddc);
sys/dev/drm/i915/intel_lspcon.c
137
struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
sys/dev/drm/i915/intel_lspcon.c
56
struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
sys/dev/drm/i915/intel_lspcon.c
93
struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
sys/dev/drm/i915/intel_sdvo.c
1743
return drm_get_edid(connector, &sdvo->ddc);
sys/dev/drm/i915/intel_sdvo.c
1769
u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
sys/dev/drm/i915/intel_sdvo.c
1775
for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
sys/dev/drm/i915/intel_sdvo.c
1776
intel_sdvo->ddc_bus = ddc;
sys/dev/drm/i915/intel_sdvo.c
2046
intel_ddc_get_modes(connector, &intel_sdvo->ddc);
sys/dev/drm/i915/intel_sdvo.c
2199
&sdvo->ddc.dev.kobj,
sys/dev/drm/i915/intel_sdvo.c
2200
sdvo->ddc.dev.kobj.name);
sys/dev/drm/i915/intel_sdvo.c
2209
sdvo->ddc.dev.kobj.name);
sys/dev/drm/i915/intel_sdvo.c
2276
i2c_del_adapter(&intel_sdvo->ddc);
sys/dev/drm/i915/intel_sdvo.c
3031
sdvo->ddc.owner = THIS_MODULE;
sys/dev/drm/i915/intel_sdvo.c
3032
sdvo->ddc.class = I2C_CLASS_DDC;
sys/dev/drm/i915/intel_sdvo.c
3034
snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
sys/dev/drm/i915/intel_sdvo.c
3035
sdvo->ddc.dev.parent = &pdev->dev;
sys/dev/drm/i915/intel_sdvo.c
3036
sdvo->ddc.algo_data = sdvo;
sys/dev/drm/i915/intel_sdvo.c
3037
sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
sys/dev/drm/i915/intel_sdvo.c
3038
sdvo->ddc.lock_ops = &proxy_lock_ops;
sys/dev/drm/i915/intel_sdvo.c
3040
return i2c_add_adapter(&sdvo->ddc) == 0;
sys/dev/drm/i915/intel_sdvo.c
3172
i2c_del_adapter(&intel_sdvo->ddc);
sys/dev/drm/i915/intel_sdvo.c
74
struct i2c_adapter ddc;
sys/dev/drm/include/drm/drm_dp_helper.h
1143
struct i2c_adapter ddc;
sys/dev/drm/radeon/radeon_combios.c
411
enum radeon_combios_ddc ddc,
sys/dev/drm/radeon/radeon_combios.c
440
switch (ddc) {
sys/dev/drm/radeon/radeon_combios.c
465
ddc = DDC_DVI;
sys/dev/drm/radeon/radeon_combios.c
474
ddc = DDC_DVI;
sys/dev/drm/radeon/radeon_combios.c
481
ddc = DDC_MONID;
sys/dev/drm/radeon/radeon_combios.c
627
i2c.i2c_id = ddc;
sys/dev/drm/radeon/radeon_connectors.c
313
&radeon_connector->ddc_bus->aux.ddc);
sys/dev/drm/radeon/radeon_connectors.c
322
&radeon_connector->ddc_bus->aux.ddc);
sys/dev/drm/radeon/radeon_i2c.c
67
ret = i2c_transfer(&radeon_connector->ddc_bus->aux.ddc, msgs, 2);