sys/dev/drm/amd/display/dc/dce/dce_i2c.c

33

struct dce_i2c_hw *dce_i2c_hw;

sys/dev/drm/amd/display/dc/dce/dce_i2c.c

50

dce_i2c_hw = acquire_i2c_hw_engine(pool, ddc);

sys/dev/drm/amd/display/dc/dce/dce_i2c.c

52

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c.c

55

return dce_i2c_submit_command_hw(pool, ddc, cmd, dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

112

const struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

121

dce_i2c_hw->reference_frequency / pre_scale :

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

122

dce_i2c_hw->default_speed;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

126

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

133

DC_I2C_INDEX, dce_i2c_hw->buffer_used_write,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

154

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

163

last_transaction = ((dce_i2c_hw->transaction_count == 3) ||

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

168

switch (dce_i2c_hw->transaction_count) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

213

if (dce_i2c_hw->transaction_count == 0) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

219

dce_i2c_hw->buffer_used_write = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

225

dce_i2c_hw->buffer_used_write++;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

232

dce_i2c_hw->buffer_used_write++;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

237

++dce_i2c_hw->transaction_count;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

238

dce_i2c_hw->buffer_used_bytes += length + 1;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

243

static inline void reset_hw_engine(struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

251

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

256

if (dce_i2c_hw->masks->DC_I2C_DDC1_START_STOP_TIMING_CNTL)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

258

FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_PRESCALE), dce_i2c_hw->reference_frequency / speed,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

263

FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_PRESCALE), dce_i2c_hw->reference_frequency / speed,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

269

struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

273

if (dce_i2c_hw->setup_limit != 0)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

274

i2c_setup_limit = dce_i2c_hw->setup_limit;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

282

DC_I2C_DDC_SELECT, dce_i2c_hw->engine_id);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

285

if (dce_i2c_hw->send_reset_length == 0) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

303

static bool is_hw_busy(struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

31

dce_i2c_hw->ctx

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

311

reset_hw_engine(dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

318

struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

324

set_speed(dce_i2c_hw, dce_i2c_hw->original_speed);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

33

dce_i2c_hw->regs->reg

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

345

if (!dce_i2c_hw->engine_keep_power_up_count)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

350

struct dce_i2c_hw *acquire_i2c_hw_engine(

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

357

struct dce_i2c_hw *dce_i2c_hw = NULL;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

366

dce_i2c_hw = pool->hw_i2cs[line];

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

369

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

37

dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

392

dce_i2c_hw->ddc = ddc;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

394

current_speed = get_speed(dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

397

dce_i2c_hw->original_speed = current_speed;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

399

if (!setup_engine(dce_i2c_hw)) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

40

struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

400

release_engine(dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

405

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

410

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

423

dce_i2c_hw, NULL);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

436

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

441

if (!process_transaction(dce_i2c_hw, request))

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

444

if (is_hw_busy(dce_i2c_hw)) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

449

execute_transaction(dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

455

const struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

459

uint32_t speed = get_speed(dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

473

(dce_i2c_hw->buffer_used_bytes << 3) +

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

474

(dce_i2c_hw->transaction_count << 1);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

481

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

500

get_hw_buffer_available_size(dce_i2c_hw)) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

521

dce_i2c_hw, payload->length + 1);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

524

dce_i2c_hw, &request);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

533

dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

543

process_channel_reply(dce_i2c_hw, payload);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

55

DC_I2C_TRANSACTION_COUNT, dce_i2c_hw->transaction_count - 1);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

552

struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

557

set_speed(dce_i2c_hw, cmd->speed);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

567

dce_i2c_hw, payload, mot)) {

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

579

release_engine(dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

580

dal_ddc_close(dce_i2c_hw->ddc);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

582

dce_i2c_hw->ddc = NULL;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

588

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

595

dce_i2c_hw->ctx = ctx;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

596

dce_i2c_hw->engine_id = engine_id;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

597

dce_i2c_hw->reference_frequency = get_reference_clock(ctx->dc_bios) >> 1;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

598

dce_i2c_hw->regs = regs;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

599

dce_i2c_hw->shifts = shifts;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

600

dce_i2c_hw->masks = masks;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

601

dce_i2c_hw->buffer_used_bytes = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

602

dce_i2c_hw->transaction_count = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

603

dce_i2c_hw->engine_keep_power_up_count = 1;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

604

dce_i2c_hw->original_speed = DEFAULT_I2C_HW_SPEED;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

605

dce_i2c_hw->default_speed = DEFAULT_I2C_HW_SPEED;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

606

dce_i2c_hw->send_reset_length = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

607

dce_i2c_hw->setup_limit = I2C_SETUP_TIME_LIMIT_DCE;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

608

dce_i2c_hw->buffer_size = I2C_HW_BUFFER_SIZE_DCE;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

612

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

622

dce_i2c_hw_construct(dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

628

dce_i2c_hw->buffer_size = I2C_HW_BUFFER_SIZE_DCE100;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

63

dce_i2c_hw->transaction_count = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

64

dce_i2c_hw->buffer_used_bytes = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

642

dce_i2c_hw->reference_frequency =

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

643

(dce_i2c_hw->reference_frequency * 2) / xtal_ref_div;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

647

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

654

dce100_i2c_hw_construct(dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

660

dce_i2c_hw->default_speed = DEFAULT_I2C_HW_SPEED_100KHZ;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

664

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

671

dce112_i2c_hw_construct(dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

677

dce_i2c_hw->setup_limit = I2C_SETUP_TIME_LIMIT_DCN;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

68

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

76

else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

78

else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

80

else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

82

else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

93

const struct dce_i2c_hw *dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

95

return dce_i2c_hw->buffer_size -

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

96

dce_i2c_hw->buffer_used_bytes;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h

260

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h

268

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h

276

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h

284

struct dce_i2c_hw *dce_i2c_hw,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h

295

struct dce_i2c_hw *dce_i2c_hw);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.h

297

struct dce_i2c_hw *acquire_i2c_hw_engine(

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

632

struct dce_i2c_hw *dce100_i2c_hw_create(

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

636

struct dce_i2c_hw *dce_i2c_hw =

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

637

kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

639

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

642

dce100_i2c_hw_construct(dce_i2c_hw, ctx, inst,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

645

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

646

struct dce_i2c_hw *dce110_i2c_hw_create(

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

650

struct dce_i2c_hw *dce_i2c_hw =

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

651

kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

653

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

656

dce100_i2c_hw_construct(dce_i2c_hw, ctx, inst,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

659

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

651

struct dce_i2c_hw *dce112_i2c_hw_create(

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

655

struct dce_i2c_hw *dce_i2c_hw =

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

656

kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

658

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

661

dce112_i2c_hw_construct(dce_i2c_hw, ctx, inst,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

664

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

419

struct dce_i2c_hw *dce120_i2c_hw_create(

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

423

struct dce_i2c_hw *dce_i2c_hw =

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

424

kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

426

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

429

dce112_i2c_hw_construct(dce_i2c_hw, ctx, inst,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

432

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

510

struct dce_i2c_hw *dce80_i2c_hw_create(

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

514

struct dce_i2c_hw *dce_i2c_hw =

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

515

kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

517

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

520

dce_i2c_hw_construct(dce_i2c_hw, ctx, inst,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

523

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

651

struct dce_i2c_hw *dcn10_i2c_hw_create(

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

655

struct dce_i2c_hw *dce_i2c_hw =

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

656

kzalloc(sizeof(struct dce_i2c_hw), GFP_KERNEL);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

658

if (!dce_i2c_hw)

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

661

dcn1_i2c_hw_construct(dce_i2c_hw, ctx, inst,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

664

return dce_i2c_hw;

sys/dev/drm/amd/display/dc/inc/core_types.h

150

struct dce_i2c_hw *hw_i2cs[MAX_PIPES];