sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2179

static bool modeset_required(struct drm_crtc_state *crtc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2183

if (!drm_atomic_crtc_needs_modeset(crtc_state))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2186

if (!crtc_state->enable)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2189

return crtc_state->active;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2192

static bool modereset_required(struct drm_crtc_state *crtc_state)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2194

if (!drm_atomic_crtc_needs_modeset(crtc_state))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2197

return !crtc_state->enable || !crtc_state->active;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2432

struct drm_crtc_state *crtc_state)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2454

ret = amdgpu_dm_set_degamma_lut(crtc_state, dc_plane_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3415

struct drm_crtc_state *crtc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4289

struct dm_crtc_state *crtc_state = crtc ? to_dm_crtc_state(crtc->state) : NULL;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4311

if (crtc_state && crtc_state->stream)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4312

dc_stream_set_cursor_position(crtc_state->stream,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4330

if (crtc_state->stream) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4331

if (!dc_stream_set_cursor_attributes(crtc_state->stream,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4335

if (!dc_stream_set_cursor_position(crtc_state->stream,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4694

static void amdgpu_dm_crtc_copy_transient_flags(struct drm_crtc_state *crtc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4697

stream_state->mode_changed = crtc_state->mode_changed;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4985

struct drm_crtc_state *crtc_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5005

crtc_state = drm_atomic_get_crtc_state(state, &disconnected_acrtc->base);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5007

ret = PTR_ERR_OR_ZERO(crtc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5012

crtc_state->mode_changed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h

275

int amdgpu_dm_set_degamma_lut(struct drm_crtc_state *crtc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

243

int amdgpu_dm_set_degamma_lut(struct drm_crtc_state *crtc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

246

struct drm_property_blob *blob = crtc_state->degamma_lut;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

107

crtc_state->crc_skip_count = 0;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

120

struct dm_crtc_state *crtc_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

127

crtc_state = to_dm_crtc_state(crtc->state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

128

stream_state = crtc_state->stream;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

131

if (!crtc_state->crc_enabled)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

140

if (crtc_state->crc_skip_count < 2) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

141

crtc_state->crc_skip_count += 1;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

67

struct dm_crtc_state *crtc_state = to_dm_crtc_state(crtc->state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

68

struct dc_stream_state *stream_state = crtc_state->stream;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

88

crtc_state->crc_enabled = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

98

crtc_state->crc_enabled = false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2015

enum crtc_state state)

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.h

270

enum crtc_state state);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

226

enum crtc_state state)

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

818

enum crtc_state state)

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

756

enum crtc_state state)

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.h

506

enum crtc_state state);

sys/dev/drm/amd/display/dc/inc/hw/timing_generator.h

165

enum crtc_state state);

sys/dev/drm/drm_atomic.c

1013

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/drm_atomic.c

1014

if (drm_atomic_crtc_needs_modeset(crtc_state)) {

sys/dev/drm/drm_atomic.c

1090

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic.c

1100

for_each_new_crtc_in_state(state, crtc, crtc_state, i)

sys/dev/drm/drm_atomic.c

1101

drm_atomic_crtc_print_state(&p, crtc_state);

sys/dev/drm/drm_atomic.c

289

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic.c

293

crtc_state = drm_atomic_get_existing_crtc_state(state, crtc);

sys/dev/drm/drm_atomic.c

294

if (crtc_state)

sys/dev/drm/drm_atomic.c

295

return crtc_state;

sys/dev/drm/drm_atomic.c

301

crtc_state = crtc->funcs->atomic_duplicate_state(crtc);

sys/dev/drm/drm_atomic.c

302

if (!crtc_state)

sys/dev/drm/drm_atomic.c

305

state->crtcs[index].state = crtc_state;

sys/dev/drm/drm_atomic.c

307

state->crtcs[index].new_state = crtc_state;

sys/dev/drm/drm_atomic.c

309

crtc_state->state = state;

sys/dev/drm/drm_atomic.c

312

crtc->base.id, crtc->name, crtc_state, state);

sys/dev/drm/drm_atomic.c

314

return crtc_state;

sys/dev/drm/drm_atomic.c

396

struct drm_crtc_state *crtc_state = NULL;

sys/dev/drm/drm_atomic.c

409

crtc_state = drm_atomic_get_existing_crtc_state(state->state,

sys/dev/drm/drm_atomic.c

412

if (writeback_job->fb && crtc_state != NULL && !crtc_state->active) {

sys/dev/drm/drm_atomic.c

479

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic.c

481

crtc_state = drm_atomic_get_crtc_state(state,

sys/dev/drm/drm_atomic.c

483

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic.c

484

return ERR_CAST(crtc_state);

sys/dev/drm/drm_atomic.c

820

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic.c

822

crtc_state = drm_atomic_get_crtc_state(state,

sys/dev/drm/drm_atomic.c

824

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic.c

825

return ERR_CAST(crtc_state);

sys/dev/drm/drm_atomic.c

873

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic.c

876

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic.c

877

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic.c

878

return PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic.c

893

if (!(crtc_state->connector_mask & drm_connector_mask(connector)))

sys/dev/drm/drm_atomic.c

968

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic.c

984

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/drm_atomic.c

985

ret = drm_atomic_crtc_check(crtc, crtc_state);

sys/dev/drm/drm_atomic_helper.c

153

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

1564

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

1571

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/drm_atomic_helper.c

1572

if (drm_atomic_crtc_needs_modeset(crtc_state))

sys/dev/drm/drm_atomic_helper.c

183

crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

sys/dev/drm/drm_atomic_helper.c

189

if (!crtc_state->connector_mask) {

sys/dev/drm/drm_atomic_helper.c

190

ret = drm_atomic_set_mode_prop_for_crtc(crtc_state,

sys/dev/drm/drm_atomic_helper.c

195

crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

209

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

224

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

226

crtc_state->encoder_mask &=

sys/dev/drm/drm_atomic_helper.c

235

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

237

crtc_state->encoder_mask |=

sys/dev/drm/drm_atomic_helper.c

2384

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

2386

crtc_state = old_plane_state->crtc->state;

sys/dev/drm/drm_atomic_helper.c

2388

if (drm_atomic_crtc_needs_modeset(crtc_state) &&

sys/dev/drm/drm_atomic_helper.c

249

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

268

crtc_state = drm_atomic_get_new_crtc_state(state, encoder_crtc);

sys/dev/drm/drm_atomic_helper.c

269

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

283

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

291

crtc_state = drm_atomic_get_new_crtc_state(state, old_connector_state->crtc);

sys/dev/drm/drm_atomic_helper.c

292

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

2954

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

296

crtc_state = drm_atomic_get_new_crtc_state(state, new_connector_state->crtc);

sys/dev/drm/drm_atomic_helper.c

2960

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

2961

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic_helper.c

2962

return PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_helper.c

297

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

2972

ret = drm_atomic_set_mode_for_crtc(crtc_state, NULL);

sys/dev/drm/drm_atomic_helper.c

2976

crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

2990

ret = drm_atomic_set_mode_for_crtc(crtc_state, set->mode);

sys/dev/drm/drm_atomic_helper.c

2994

crtc_state->active = true;

sys/dev/drm/drm_atomic_helper.c

3034

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

3045

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

3046

if (IS_ERR(crtc_state)) {

sys/dev/drm/drm_atomic_helper.c

3047

ret = PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_helper.c

3051

crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

3053

ret = drm_atomic_set_mode_prop_for_crtc(crtc_state, NULL);

sys/dev/drm/drm_atomic_helper.c

311

crtc_state = drm_atomic_get_new_crtc_state(state,

sys/dev/drm/drm_atomic_helper.c

325

if (drm_connector_is_unregistered(connector) && crtc_state->active) {

sys/dev/drm/drm_atomic_helper.c

3314

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

3317

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

3318

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic_helper.c

3319

return PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_helper.c

3321

crtc_state->event = event;

sys/dev/drm/drm_atomic_helper.c

3322

crtc_state->pageflip_flags = flags;

sys/dev/drm/drm_atomic_helper.c

3335

if (!crtc_state->active) {

sys/dev/drm/drm_atomic_helper.c

3413

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

3426

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

3427

if (WARN_ON(!crtc_state)) {

sys/dev/drm/drm_atomic_helper.c

3431

crtc_state->target_vblank = target;

sys/dev/drm/drm_atomic_helper.c

375

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

3858

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

3860

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

3861

if (IS_ERR(crtc_state)) {

sys/dev/drm/drm_atomic_helper.c

3862

err = PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_helper.c

3959

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

3987

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

3988

if (IS_ERR(crtc_state)) {

sys/dev/drm/drm_atomic_helper.c

3989

ret = PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_helper.c

3994

replaced = drm_property_replace_blob(&crtc_state->degamma_lut, NULL);

sys/dev/drm/drm_atomic_helper.c

3995

replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL);

sys/dev/drm/drm_atomic_helper.c

3996

replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, blob);

sys/dev/drm/drm_atomic_helper.c

3997

crtc_state->color_mgmt_changed |= replaced;

sys/dev/drm/drm_atomic_helper.c

517

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

524

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_helper.c

525

if (!crtc_state)

sys/dev/drm/drm_atomic_helper.c

527

if (!crtc_state->mode_changed && !crtc_state->connectors_changed)

sys/dev/drm/drm_atomic_helper.c

530

mode = &crtc_state->mode;

sys/dev/drm/drm_atomic_helper.c

73

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_helper.c

741

const struct drm_crtc_state *crtc_state,

sys/dev/drm/drm_atomic_helper.c

754

WARN_ON(plane_state->crtc && plane_state->crtc != crtc_state->crtc);

sys/dev/drm/drm_atomic_helper.c

76

crtc_state = drm_atomic_get_new_crtc_state(state,

sys/dev/drm/drm_atomic_helper.c

770

if (!crtc_state->enable && !can_update_disabled) {

sys/dev/drm/drm_atomic_helper.c

787

if (crtc_state->enable)

sys/dev/drm/drm_atomic_helper.c

788

drm_mode_get_hv_timing(&crtc_state->mode, &clip.x2, &clip.y2);

sys/dev/drm/drm_atomic_helper.c

79

if (WARN_ON(!crtc_state))

sys/dev/drm/drm_atomic_helper.c

82

crtc_state->planes_changed = true;

sys/dev/drm/drm_atomic_helper.c

86

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

sys/dev/drm/drm_atomic_helper.c

88

if (WARN_ON(!crtc_state))

sys/dev/drm/drm_atomic_helper.c

91

crtc_state->planes_changed = true;

sys/dev/drm/drm_atomic_uapi.c

1070

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_uapi.c

1078

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/drm_atomic_uapi.c

1081

fence_ptr = get_out_fence_for_crtc(crtc_state->state, crtc);

sys/dev/drm/drm_atomic_uapi.c

1090

crtc_state->event = e;

sys/dev/drm/drm_atomic_uapi.c

1094

struct drm_pending_vblank_event *e = crtc_state->event;

sys/dev/drm/drm_atomic_uapi.c

1103

crtc_state->event = NULL;

sys/dev/drm/drm_atomic_uapi.c

1132

crtc_state->event->base.fence = fence;

sys/dev/drm/drm_atomic_uapi.c

1194

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_uapi.c

1206

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/drm_atomic_uapi.c

1207

struct drm_pending_vblank_event *event = crtc_state->event;

sys/dev/drm/drm_atomic_uapi.c

1215

crtc_state->event = NULL;

sys/dev/drm/drm_atomic_uapi.c

181

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_uapi.c

186

crtc_state = drm_atomic_get_crtc_state(plane_state->state,

sys/dev/drm/drm_atomic_uapi.c

188

if (WARN_ON(IS_ERR(crtc_state)))

sys/dev/drm/drm_atomic_uapi.c

189

return PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_uapi.c

191

crtc_state->plane_mask &= ~drm_plane_mask(plane);

sys/dev/drm/drm_atomic_uapi.c

197

crtc_state = drm_atomic_get_crtc_state(plane_state->state,

sys/dev/drm/drm_atomic_uapi.c

199

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic_uapi.c

200

return PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_uapi.c

201

crtc_state->plane_mask |= drm_plane_mask(plane);

sys/dev/drm/drm_atomic_uapi.c

300

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_uapi.c

306

crtc_state = drm_atomic_get_new_crtc_state(conn_state->state,

sys/dev/drm/drm_atomic_uapi.c

309

crtc_state->connector_mask &=

sys/dev/drm/drm_atomic_uapi.c

317

crtc_state = drm_atomic_get_crtc_state(conn_state->state, crtc);

sys/dev/drm/drm_atomic_uapi.c

318

if (IS_ERR(crtc_state))

sys/dev/drm/drm_atomic_uapi.c

319

return PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_uapi.c

321

crtc_state->connector_mask |=

sys/dev/drm/drm_atomic_uapi.c

881

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_uapi.c

901

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_uapi.c

902

if (IS_ERR(crtc_state)) {

sys/dev/drm/drm_atomic_uapi.c

903

ret = PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_uapi.c

916

crtc_state->active = active;

sys/dev/drm/drm_atomic_uapi.c

952

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_atomic_uapi.c

954

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_atomic_uapi.c

955

if (IS_ERR(crtc_state)) {

sys/dev/drm/drm_atomic_uapi.c

956

ret = PTR_ERR(crtc_state);

sys/dev/drm/drm_atomic_uapi.c

961

crtc_state, prop, prop_value);

sys/dev/drm/drm_blend.c

420

struct drm_crtc_state *crtc_state)

sys/dev/drm/drm_blend.c

422

struct drm_atomic_state *state = crtc_state->state;

sys/dev/drm/drm_blend.c

441

drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) {

sys/dev/drm/drm_blend.c

463

crtc_state->zpos_changed = true;

sys/dev/drm/drm_crtc_helper.c

1009

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_crtc_helper.c

1014

crtc_state = crtc->funcs->atomic_duplicate_state(crtc);

sys/dev/drm/drm_crtc_helper.c

1019

crtc_state = drm_atomic_helper_crtc_duplicate_state(crtc);

sys/dev/drm/drm_crtc_helper.c

1022

if (!crtc_state)

sys/dev/drm/drm_crtc_helper.c

1025

crtc_state->planes_changed = true;

sys/dev/drm/drm_crtc_helper.c

1026

crtc_state->mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

1027

ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);

sys/dev/drm/drm_crtc_helper.c

1030

drm_mode_copy(&crtc_state->adjusted_mode, adjusted_mode);

sys/dev/drm/drm_crtc_helper.c

1033

ret = crtc_funcs->atomic_check(crtc, crtc_state);

sys/dev/drm/drm_crtc_helper.c

1038

swap(crtc->state, crtc_state);

sys/dev/drm/drm_crtc_helper.c

1045

if (crtc_state) {

sys/dev/drm/drm_crtc_helper.c

1047

crtc->funcs->atomic_destroy_state(crtc, crtc_state);

sys/dev/drm/drm_crtc_helper.c

1049

drm_atomic_helper_crtc_destroy_state(crtc, crtc_state);

sys/dev/drm/drm_fb_helper.c

1452

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_fb_helper.c

1480

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/drm_fb_helper.c

1481

if (IS_ERR(crtc_state)) {

sys/dev/drm/drm_fb_helper.c

1482

ret = PTR_ERR(crtc_state);

sys/dev/drm/drm_fb_helper.c

1486

replaced = drm_property_replace_blob(&crtc_state->degamma_lut,

sys/dev/drm/drm_fb_helper.c

1488

replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL);

sys/dev/drm/drm_fb_helper.c

1489

replaced |= drm_property_replace_blob(&crtc_state->gamma_lut,

sys/dev/drm/drm_fb_helper.c

1491

crtc_state->color_mgmt_changed |= replaced;

sys/dev/drm/drm_fb_helper.c

445

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

sys/dev/drm/drm_fb_helper.c

447

crtc_state->active = false;

sys/dev/drm/drm_framebuffer.c

881

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_framebuffer.c

883

crtc_state = drm_atomic_get_existing_crtc_state(state, plane_state->crtc);

sys/dev/drm/drm_framebuffer.c

889

crtc_state->active = false;

sys/dev/drm/drm_framebuffer.c

890

ret = drm_atomic_set_mode_for_crtc(crtc_state, NULL);

sys/dev/drm/drm_plane_helper.c

156

struct drm_crtc_state crtc_state = {

sys/dev/drm/drm_plane_helper.c

163

ret = drm_atomic_helper_check_plane_state(&plane_state, &crtc_state,

sys/dev/drm/drm_simple_kms_helper.c

134

struct drm_crtc_state *crtc_state;

sys/dev/drm/drm_simple_kms_helper.c

138

crtc_state = drm_atomic_get_new_crtc_state(plane_state->state,

sys/dev/drm/drm_simple_kms_helper.c

141

ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state,

sys/dev/drm/drm_simple_kms_helper.c

154

return pipe->funcs->check(pipe, plane_state, crtc_state);

sys/dev/drm/i915/i915_drv.h

3574

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/i915_drv.h

3577

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

3579

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

3588

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

3590

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

435

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

442

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/i915_drv.h

448

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

457

void (*load_csc_matrix)(struct drm_crtc_state *crtc_state);

sys/dev/drm/i915/i915_drv.h

458

void (*load_luts)(struct drm_crtc_state *crtc_state);

sys/dev/drm/i915/intel_atomic.c

113

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_atomic.c

120

crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);

sys/dev/drm/i915/intel_atomic.c

131

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_atomic.c

170

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_atomic.c

172

crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);

sys/dev/drm/i915/intel_atomic.c

173

if (!crtc_state)

sys/dev/drm/i915/intel_atomic.c

176

__drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);

sys/dev/drm/i915/intel_atomic.c

178

crtc_state->update_pipe = false;

sys/dev/drm/i915/intel_atomic.c

179

crtc_state->disable_lp_wm = false;

sys/dev/drm/i915/intel_atomic.c

180

crtc_state->disable_cxsr = false;

sys/dev/drm/i915/intel_atomic.c

181

crtc_state->update_wm_pre = false;

sys/dev/drm/i915/intel_atomic.c

182

crtc_state->update_wm_post = false;

sys/dev/drm/i915/intel_atomic.c

183

crtc_state->fb_changed = false;

sys/dev/drm/i915/intel_atomic.c

184

crtc_state->fifo_changed = false;

sys/dev/drm/i915/intel_atomic.c

185

crtc_state->wm.need_postvbl_update = false;

sys/dev/drm/i915/intel_atomic.c

186

crtc_state->fb_bits = 0;

sys/dev/drm/i915/intel_atomic.c

188

return &crtc_state->base;

sys/dev/drm/i915/intel_atomic.c

225

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_atomic.c

231

&crtc_state->scaler_state;

sys/dev/drm/i915/intel_atomic.c

232

struct drm_atomic_state *drm_state = crtc_state->base.state;

sys/dev/drm/i915/intel_atomic.c

300

crtc_state->base.planes_changed = true;

sys/dev/drm/i915/intel_atomic_plane.c

111

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_atomic_plane.c

124

ret = intel_plane->check_plane(crtc_state, intel_state);

sys/dev/drm/i915/intel_atomic_plane.c

130

crtc_state->active_planes |= BIT(intel_plane->id);

sys/dev/drm/i915/intel_atomic_plane.c

132

crtc_state->active_planes &= ~BIT(intel_plane->id);

sys/dev/drm/i915/intel_atomic_plane.c

135

crtc_state->nv12_planes |= BIT(intel_plane->id);

sys/dev/drm/i915/intel_atomic_plane.c

137

crtc_state->nv12_planes &= ~BIT(intel_plane->id);

sys/dev/drm/i915/intel_atomic_plane.c

140

&crtc_state->base,

sys/dev/drm/i915/intel_audio.c

115

audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate)

sys/dev/drm/i915/intel_audio.c

121

crtc_state->port_clock == dp_aud_n_m[i].clock)

sys/dev/drm/i915/intel_audio.c

187

static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_audio.c

190

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_audio.c

211

static int audio_config_hdmi_get_n(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_audio.c

215

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_audio.c

276

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_audio.c

317

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_audio.c

321

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

329

nm = audio_config_dp_get_n_m(crtc_state, rate);

sys/dev/drm/i915/intel_audio.c

365

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_audio.c

369

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

381

tmp |= audio_config_hdmi_pixel_clock(crtc_state);

sys/dev/drm/i915/intel_audio.c

383

n = audio_config_hdmi_get_n(crtc_state, rate);

sys/dev/drm/i915/intel_audio.c

408

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_audio.c

410

if (intel_crtc_has_dp_encoder(crtc_state))

sys/dev/drm/i915/intel_audio.c

411

hsw_dp_audio_config_update(encoder, crtc_state);

sys/dev/drm/i915/intel_audio.c

413

hsw_hdmi_audio_config_update(encoder, crtc_state);

sys/dev/drm/i915/intel_audio.c

449

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_audio.c

453

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

494

hsw_audio_config_update(encoder, crtc_state);

sys/dev/drm/i915/intel_audio.c

546

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_audio.c

550

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

617

if (intel_crtc_has_dp_encoder(crtc_state))

sys/dev/drm/i915/intel_audio.c

620

tmp |= audio_config_hdmi_pixel_clock(crtc_state);

sys/dev/drm/i915/intel_audio.c

634

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_audio.c

639

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_audio.c

642

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_audio.c

659

crtc_state,

sys/dev/drm/i915/intel_audio.c

672

if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))

sys/dev/drm/i915/intel_audio.c

679

crtc_state->port_clock,

sys/dev/drm/i915/intel_audio.c

680

intel_crtc_has_dp_encoder(crtc_state));

sys/dev/drm/i915/intel_cdclk.c

2152

int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_cdclk.c

2155

to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_cdclk.c

2158

if (!crtc_state->base.enable)

sys/dev/drm/i915/intel_cdclk.c

2161

min_cdclk = intel_pixel_rate_to_cdclk(dev_priv, crtc_state->pixel_rate);

sys/dev/drm/i915/intel_cdclk.c

2164

if (IS_BROADWELL(dev_priv) && hsw_crtc_state_ips_capable(crtc_state))

sys/dev/drm/i915/intel_cdclk.c

2172

if (intel_crtc_has_dp_encoder(crtc_state) &&

sys/dev/drm/i915/intel_cdclk.c

2173

crtc_state->has_audio &&

sys/dev/drm/i915/intel_cdclk.c

2174

crtc_state->port_clock >= 540000 &&

sys/dev/drm/i915/intel_cdclk.c

2175

crtc_state->lane_count == 4) {

sys/dev/drm/i915/intel_cdclk.c

2207

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) &&

sys/dev/drm/i915/intel_cdclk.c

2225

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_cdclk.c

2232

for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {

sys/dev/drm/i915/intel_cdclk.c

2233

min_cdclk = intel_crtc_compute_min_cdclk(crtc_state);

sys/dev/drm/i915/intel_cdclk.c

2260

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_cdclk.c

2268

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/i915/intel_cdclk.c

2269

if (crtc_state->base.enable)

sys/dev/drm/i915/intel_cdclk.c

2271

crtc_state->min_voltage_level;

sys/dev/drm/i915/intel_cdclk.c

2351

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_cdclk.c

2358

for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {

sys/dev/drm/i915/intel_cdclk.c

2359

if (!crtc_state->base.enable)

sys/dev/drm/i915/intel_cdclk.c

2362

if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))

sys/dev/drm/i915/intel_cdclk.c

2369

switch (crtc_state->port_clock / 2) {

sys/dev/drm/i915/intel_color.c

135

static void ilk_load_csc_matrix(struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

137

struct drm_crtc *crtc = crtc_state->crtc;

sys/dev/drm/i915/intel_color.c

142

struct intel_crtc_state *intel_crtc_state = to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_color.c

155

} else if (crtc_state->ctm) {

sys/dev/drm/i915/intel_color.c

156

struct drm_color_ctm *ctm = crtc_state->ctm->data;

sys/dev/drm/i915/intel_color.c

303

void intel_color_set_csc(struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

305

struct drm_device *dev = crtc_state->crtc->dev;

sys/dev/drm/i915/intel_color.c

309

dev_priv->display.load_csc_matrix(crtc_state);

sys/dev/drm/i915/intel_color.c

315

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

324

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))

sys/dev/drm/i915/intel_color.c

355

static void i9xx_load_luts(struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

357

i9xx_load_luts_internal(crtc_state->crtc, crtc_state->gamma_lut,

sys/dev/drm/i915/intel_color.c

358

to_intel_crtc_state(crtc_state));

sys/dev/drm/i915/intel_color.c

362

static void haswell_load_luts(struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

364

struct drm_crtc *crtc = crtc_state->crtc;

sys/dev/drm/i915/intel_color.c

369

to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_color.c

385

i9xx_load_luts(crtc_state);

sys/dev/drm/i915/intel_color.c

608

void intel_color_load_luts(struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

610

struct drm_device *dev = crtc_state->crtc->dev;

sys/dev/drm/i915/intel_color.c

613

dev_priv->display.load_luts(crtc_state);

sys/dev/drm/i915/intel_color.c

617

struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_color.c

629

if ((!crtc_state->degamma_lut ||

sys/dev/drm/i915/intel_color.c

630

drm_color_lut_size(crtc_state->degamma_lut) == degamma_length) &&

sys/dev/drm/i915/intel_color.c

631

(!crtc_state->gamma_lut ||

sys/dev/drm/i915/intel_color.c

632

drm_color_lut_size(crtc_state->gamma_lut) == gamma_length))

sys/dev/drm/i915/intel_color.c

639

if (crtc_state_is_legacy_gamma(crtc_state))

sys/dev/drm/i915/intel_crt.c

150

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_crt.c

155

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_crt.c

156

const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_crt.c

250

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_crt.c

255

WARN_ON(!crtc_state->has_pch_encoder);

sys/dev/drm/i915/intel_crt.c

261

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_crt.c

265

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_crt.c

268

WARN_ON(!crtc_state->has_pch_encoder);

sys/dev/drm/i915/intel_crt.c

272

dev_priv->display.fdi_link_train(crtc, crtc_state);

sys/dev/drm/i915/intel_crt.c

274

intel_ddi_enable_pipe_clock(crtc_state);

sys/dev/drm/i915/intel_crt.c

278

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_crt.c

282

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_crt.c

285

WARN_ON(!crtc_state->has_pch_encoder);

sys/dev/drm/i915/intel_crt.c

287

intel_crt_set_dpms(encoder, crtc_state, DRM_MODE_DPMS_ON);

sys/dev/drm/i915/intel_crt.c

296

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_crt.c

299

intel_crt_set_dpms(encoder, crtc_state, DRM_MODE_DPMS_ON);

sys/dev/drm/i915/intel_ddi.c

1108

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

1117

intel_prepare_dp_ddi_buffers(encoder, crtc_state);

sys/dev/drm/i915/intel_ddi.c

1134

FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);

sys/dev/drm/i915/intel_ddi.c

1144

ddi_pll_sel = hsw_pll_to_ddi_pll_sel(crtc_state->shared_dpll);

sys/dev/drm/i915/intel_ddi.c

1164

((crtc_state->fdi_lanes - 1) << 1) |

sys/dev/drm/i915/intel_ddi.c

1705

static int bxt_calc_pll_link(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

1711

if (WARN_ON(!crtc_state->shared_dpll))

sys/dev/drm/i915/intel_ddi.c

1714

state = &crtc_state->dpll_hw_state;

sys/dev/drm/i915/intel_ddi.c

1752

void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

1754

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1756

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_ddi.c

1759

if (!intel_crtc_has_dp_encoder(crtc_state))

sys/dev/drm/i915/intel_ddi.c

1766

if (crtc_state->limited_color_range)

sys/dev/drm/i915/intel_ddi.c

1769

switch (crtc_state->pipe_bpp) {

sys/dev/drm/i915/intel_ddi.c

1783

MISSING_CASE(crtc_state->pipe_bpp);

sys/dev/drm/i915/intel_ddi.c

1790

void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

1793

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1795

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_ddi.c

1806

void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

1808

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1812

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_ddi.c

1820

switch (crtc_state->pipe_bpp) {

sys/dev/drm/i915/intel_ddi.c

1837

if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC)

sys/dev/drm/i915/intel_ddi.c

1839

if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC)

sys/dev/drm/i915/intel_ddi.c

1850

(crtc_state->pch_pfit.enabled ||

sys/dev/drm/i915/intel_ddi.c

1851

crtc_state->pch_pfit.force_thru))

sys/dev/drm/i915/intel_ddi.c

1868

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {

sys/dev/drm/i915/intel_ddi.c

1869

if (crtc_state->has_hdmi_sink)

sys/dev/drm/i915/intel_ddi.c

1874

if (crtc_state->hdmi_scrambling)

sys/dev/drm/i915/intel_ddi.c

1876

if (crtc_state->hdmi_high_tmds_clock_ratio)

sys/dev/drm/i915/intel_ddi.c

1878

} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {

sys/dev/drm/i915/intel_ddi.c

1880

temp |= (crtc_state->fdi_lanes - 1) << 1;

sys/dev/drm/i915/intel_ddi.c

1881

} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {

sys/dev/drm/i915/intel_ddi.c

1883

temp |= DDI_PORT_WIDTH(crtc_state->lane_count);

sys/dev/drm/i915/intel_ddi.c

1886

temp |= DDI_PORT_WIDTH(crtc_state->lane_count);

sys/dev/drm/i915/intel_ddi.c

1892

void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

1894

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

1896

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_ddi.c

1905

intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {

sys/dev/drm/i915/intel_ddi.c

2097

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

2107

if (WARN_ON(intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)))

sys/dev/drm/i915/intel_ddi.c

2114

if (intel_crtc_has_dp_encoder(crtc_state)) {

sys/dev/drm/i915/intel_ddi.c

2123

void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

2125

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

2129

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_ddi.c

2136

void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

2138

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_ddi.c

2139

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_ddi.c

2752

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

2755

struct intel_shared_dpll *pll = crtc_state->shared_dpll;

sys/dev/drm/i915/intel_ddi.c

2791

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

2885

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

2892

bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);

sys/dev/drm/i915/intel_ddi.c

2900

intel_dp_set_link_params(intel_dp, crtc_state->port_clock,

sys/dev/drm/i915/intel_ddi.c

2901

crtc_state->lane_count, is_mst);

sys/dev/drm/i915/intel_ddi.c

2905

intel_ddi_clk_select(encoder, crtc_state->shared_dpll);

sys/dev/drm/i915/intel_ddi.c

2913

icl_ddi_vswing_sequence(encoder, crtc_state->port_clock,

sys/dev/drm/i915/intel_ddi.c

2920

intel_prepare_dp_ddi_buffers(encoder, crtc_state);

sys/dev/drm/i915/intel_ddi.c

2932

intel_ddi_enable_pipe_clock(crtc_state);

sys/dev/drm/i915/intel_ddi.c

2936

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

2947

intel_ddi_clk_select(encoder, crtc_state->shared_dpll);

sys/dev/drm/i915/intel_ddi.c

2952

icl_ddi_vswing_sequence(encoder, crtc_state->port_clock,

sys/dev/drm/i915/intel_ddi.c

2964

intel_ddi_enable_pipe_clock(crtc_state);

sys/dev/drm/i915/intel_ddi.c

2967

crtc_state->has_infoframe,

sys/dev/drm/i915/intel_ddi.c

2968

crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

2972

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

2975

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_ddi.c

2992

WARN_ON(crtc_state->has_pch_encoder);

sys/dev/drm/i915/intel_ddi.c

2996

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))

sys/dev/drm/i915/intel_ddi.c

2997

intel_ddi_pre_enable_hdmi(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

2999

intel_ddi_pre_enable_dp(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

3139

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

3149

intel_edp_backlight_on(crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

3150

intel_psr_enable(intel_dp, crtc_state);

sys/dev/drm/i915/intel_ddi.c

3151

intel_edp_drrs_enable(intel_dp, crtc_state);

sys/dev/drm/i915/intel_ddi.c

3153

if (crtc_state->has_audio)

sys/dev/drm/i915/intel_ddi.c

3154

intel_audio_codec_enable(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

3158

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

3167

crtc_state->hdmi_high_tmds_clock_ratio,

sys/dev/drm/i915/intel_ddi.c

3168

crtc_state->hdmi_scrambling))

sys/dev/drm/i915/intel_ddi.c

3221

if (crtc_state->has_audio)

sys/dev/drm/i915/intel_ddi.c

3222

intel_audio_codec_enable(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

3226

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

3229

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))

sys/dev/drm/i915/intel_ddi.c

3230

intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

3232

intel_enable_ddi_dp(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_ddi.c

3354

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

3356

if (IS_CANNONLAKE(dev_priv) && crtc_state->port_clock > 594000)

sys/dev/drm/i915/intel_ddi.c

3357

crtc_state->min_voltage_level = 2;

sys/dev/drm/i915/intel_ddi.c

3358

else if (IS_ICELAKE(dev_priv) && crtc_state->port_clock > 594000)

sys/dev/drm/i915/intel_ddi.c

3359

crtc_state->min_voltage_level = 1;

sys/dev/drm/i915/intel_ddi.c

3478

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_ddi.c

3548

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_ddi.c

3557

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/i915/intel_ddi.c

3558

if (IS_ERR(crtc_state)) {

sys/dev/drm/i915/intel_ddi.c

3559

ret = PTR_ERR(crtc_state);

sys/dev/drm/i915/intel_ddi.c

3563

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_ddi.c

3594

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_ddi.c

3617

crtc_state = to_intel_crtc_state(crtc->base.state);

sys/dev/drm/i915/intel_ddi.c

3619

WARN_ON(!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI));

sys/dev/drm/i915/intel_ddi.c

3621

if (!crtc_state->base.active)

sys/dev/drm/i915/intel_ddi.c

3624

if (!crtc_state->hdmi_high_tmds_clock_ratio &&

sys/dev/drm/i915/intel_ddi.c

3625

!crtc_state->hdmi_scrambling)

sys/dev/drm/i915/intel_ddi.c

3639

crtc_state->hdmi_high_tmds_clock_ratio &&

sys/dev/drm/i915/intel_ddi.c

3641

crtc_state->hdmi_scrambling)

sys/dev/drm/i915/intel_ddi.c

963

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_ddi.c

971

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))

sys/dev/drm/i915/intel_ddi.c

974

else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))

sys/dev/drm/i915/intel_display.c

10014

static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

10019

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

1008

bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock,

sys/dev/drm/i915/intel_display.c

10094

static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

10103

ret = intel_check_cursor(crtc_state, plane_state);

sys/dev/drm/i915/intel_display.c

1014

return chv_find_best_dpll(limit, crtc_state,

sys/dev/drm/i915/intel_display.c

10144

plane_state->ctl = i9xx_cursor_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_display.c

10150

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

10317

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

10401

crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);

sys/dev/drm/i915/intel_display.c

10402

if (IS_ERR(crtc_state)) {

sys/dev/drm/i915/intel_display.c

10403

ret = PTR_ERR(crtc_state);

sys/dev/drm/i915/intel_display.c

10407

crtc_state->base.active = crtc_state->base.enable = true;

sys/dev/drm/i915/intel_display.c

10412

ret = drm_atomic_set_mode_for_crtc(&crtc_state->base, mode);

sys/dev/drm/i915/intel_display.c

10630

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

10644

crtc_state = kzalloc(sizeof(*crtc_state), GFP_KERNEL);

sys/dev/drm/i915/intel_display.c

10645

if (!crtc_state) {

sys/dev/drm/i915/intel_display.c

10650

crtc_state->base.crtc = &crtc->base;

sys/dev/drm/i915/intel_display.c

10652

if (!dev_priv->display.get_pipe_config(crtc, crtc_state)) {

sys/dev/drm/i915/intel_display.c

10653

kfree(crtc_state);

sys/dev/drm/i915/intel_display.c

10658

encoder->get_config(encoder, crtc_state);

sys/dev/drm/i915/intel_display.c

10660

intel_mode_from_pipe_config(mode, crtc_state);

sys/dev/drm/i915/intel_display.c

10662

kfree(crtc_state);

sys/dev/drm/i915/intel_display.c

10720

struct drm_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

10724

struct intel_crtc_state *pipe_config = to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_display.c

10725

struct drm_crtc *crtc = crtc_state->crtc;

sys/dev/drm/i915/intel_display.c

10730

bool mode_changed = needs_modeset(crtc_state);

sys/dev/drm/i915/intel_display.c

10732

bool is_crtc_enabled = crtc_state->active;

sys/dev/drm/i915/intel_display.c

10739

to_intel_crtc_state(crtc_state),

sys/dev/drm/i915/intel_display.c

10763

to_intel_crtc_state(crtc_state)->active_planes &= ~BIT(plane->id);

sys/dev/drm/i915/intel_display.c

10855

struct drm_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

10861

to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_display.c

10862

struct drm_atomic_state *state = crtc_state->state;

sys/dev/drm/i915/intel_display.c

10864

bool mode_changed = needs_modeset(crtc_state);

sys/dev/drm/i915/intel_display.c

10866

if (mode_changed && !crtc_state->active)

sys/dev/drm/i915/intel_display.c

10869

if (mode_changed && crtc_state->enable &&

sys/dev/drm/i915/intel_display.c

10878

if (crtc_state->color_mgmt_changed) {

sys/dev/drm/i915/intel_display.c

10879

ret = intel_color_check(crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

10887

crtc_state->planes_changed = true;

sys/dev/drm/i915/intel_display.c

11270

clear_intel_crtc_state(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

11273

to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_display.c

11285

scaler_state = crtc_state->scaler_state;

sys/dev/drm/i915/intel_display.c

11286

shared_dpll = crtc_state->shared_dpll;

sys/dev/drm/i915/intel_display.c

11287

dpll_hw_state = crtc_state->dpll_hw_state;

sys/dev/drm/i915/intel_display.c

11288

force_thru = crtc_state->pch_pfit.force_thru;

sys/dev/drm/i915/intel_display.c

11289

ips_force_disable = crtc_state->ips_force_disable;

sys/dev/drm/i915/intel_display.c

11292

wm_state = crtc_state->wm;

sys/dev/drm/i915/intel_display.c

11296

memset(&crtc_state->base + 1, 0,

sys/dev/drm/i915/intel_display.c

11297

sizeof(*crtc_state) - sizeof(crtc_state->base));

sys/dev/drm/i915/intel_display.c

11299

crtc_state->scaler_state = scaler_state;

sys/dev/drm/i915/intel_display.c

11300

crtc_state->shared_dpll = shared_dpll;

sys/dev/drm/i915/intel_display.c

11301

crtc_state->dpll_hw_state = dpll_hw_state;

sys/dev/drm/i915/intel_display.c

11302

crtc_state->pch_pfit.force_thru = force_thru;

sys/dev/drm/i915/intel_display.c

11303

crtc_state->ips_force_disable = ips_force_disable;

sys/dev/drm/i915/intel_display.c

11306

crtc_state->wm = wm_state;

sys/dev/drm/i915/intel_display.c

11963

struct drm_crtc_state *crtc_state = NULL;

sys/dev/drm/i915/intel_display.c

11969

crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

sys/dev/drm/i915/intel_display.c

11971

intel_connector_verify_state(crtc_state, new_conn_state);

sys/dev/drm/i915/intel_display.c

12308

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

12317

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/i915/intel_display.c

12320

if (!crtc_state->active || !needs_modeset(crtc_state))

sys/dev/drm/i915/intel_display.c

12324

other_crtc_state = to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_display.c

12327

first_crtc_state = to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_display.c

12371

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

12373

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/i915/intel_display.c

12374

if (IS_ERR(crtc_state))

sys/dev/drm/i915/intel_display.c

12375

return PTR_ERR(crtc_state);

sys/dev/drm/i915/intel_display.c

12390

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

12393

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/i915/intel_display.c

12394

if (IS_ERR(crtc_state))

sys/dev/drm/i915/intel_display.c

12395

return PTR_ERR(crtc_state);

sys/dev/drm/i915/intel_display.c

12397

if (!crtc_state->active || needs_modeset(crtc_state))

sys/dev/drm/i915/intel_display.c

12400

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_display.c

12520

struct drm_crtc_state *old_crtc_state, *crtc_state;

sys/dev/drm/i915/intel_display.c

12526

crtc_state, i) {

sys/dev/drm/i915/intel_display.c

12527

if (crtc_state->mode.private_flags !=

sys/dev/drm/i915/intel_display.c

12529

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_display.c

12536

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {

sys/dev/drm/i915/intel_display.c

12538

to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_display.c

12540

if (!needs_modeset(crtc_state))

sys/dev/drm/i915/intel_display.c

12543

if (!crtc_state->enable) {

sys/dev/drm/i915/intel_display.c

12559

crtc_state->mode_changed = false;

sys/dev/drm/i915/intel_display.c

12563

if (needs_modeset(crtc_state))

sys/dev/drm/i915/intel_display.c

12567

needs_modeset(crtc_state) ?

sys/dev/drm/i915/intel_display.c

13245

struct drm_crtc_state *crtc_state =

sys/dev/drm/i915/intel_display.c

13260

if (needs_modeset(crtc_state)) {

sys/dev/drm/i915/intel_display.c

13367

skl_max_scale(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

13370

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

13375

if (!crtc_state->base.enable)

sys/dev/drm/i915/intel_display.c

13378

crtc_clock = crtc_state->base.adjusted_mode.crtc_clock;

sys/dev/drm/i915/intel_display.c

13379

max_dotclk = to_intel_atomic_state(crtc_state->base.state)->cdclk.logical.cdclk;

sys/dev/drm/i915/intel_display.c

13440

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

13447

if (crtc_state->has_pch_encoder) {

sys/dev/drm/i915/intel_display.c

13638

struct drm_crtc_state *crtc_state = crtc->state;

sys/dev/drm/i915/intel_display.c

13644

if (!crtc_state->active || needs_modeset(crtc_state) ||

sys/dev/drm/i915/intel_display.c

13645

to_intel_crtc_state(crtc_state)->update_pipe)

sys/dev/drm/i915/intel_display.c

14048

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

14051

&crtc_state->scaler_state;

sys/dev/drm/i915/intel_display.c

14072

struct intel_crtc_state *crtc_state = NULL;

sys/dev/drm/i915/intel_display.c

14081

crtc_state = kzalloc(sizeof(*crtc_state), GFP_KERNEL);

sys/dev/drm/i915/intel_display.c

14082

if (!crtc_state) {

sys/dev/drm/i915/intel_display.c

14086

intel_crtc->config = crtc_state;

sys/dev/drm/i915/intel_display.c

14087

intel_crtc->base.state = &crtc_state->base;

sys/dev/drm/i915/intel_display.c

14088

crtc_state->base.crtc = &intel_crtc->base;

sys/dev/drm/i915/intel_display.c

14125

intel_crtc_init_scalers(intel_crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

14152

kfree(crtc_state);

sys/dev/drm/i915/intel_display.c

1509

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

1513

u32 dpll = crtc_state->dpll_hw_state.dpll;

sys/dev/drm/i915/intel_display.c

15281

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

15294

crtc_state = drm_atomic_get_crtc_state(state, crtc);

sys/dev/drm/i915/intel_display.c

15295

if (IS_ERR(crtc_state)) {

sys/dev/drm/i915/intel_display.c

15296

ret = PTR_ERR(crtc_state);

sys/dev/drm/i915/intel_display.c

15300

if (crtc_state->active) {

sys/dev/drm/i915/intel_display.c

15311

crtc_state->color_mgmt_changed = true;

sys/dev/drm/i915/intel_display.c

1550

crtc_state->dpll_hw_state.dpll_md);

sys/dev/drm/i915/intel_display.c

15690

static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

15692

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_display.c

15705

crtc_state->base.active &&

sys/dev/drm/i915/intel_display.c

15706

crtc_state->shared_dpll &&

sys/dev/drm/i915/intel_display.c

15707

crtc_state->port_clock == 0;

sys/dev/drm/i915/intel_display.c

15714

struct intel_crtc_state *crtc_state = crtc ?

sys/dev/drm/i915/intel_display.c

15720

bool has_active_crtc = crtc_state &&

sys/dev/drm/i915/intel_display.c

15721

crtc_state->base.active;

sys/dev/drm/i915/intel_display.c

15723

if (crtc_state && has_bogus_dpll_config(crtc_state)) {

sys/dev/drm/i915/intel_display.c

15738

if (crtc_state) {

sys/dev/drm/i915/intel_display.c

15750

encoder->disable(encoder, crtc_state,

sys/dev/drm/i915/intel_display.c

15753

encoder->post_disable(encoder, crtc_state,

sys/dev/drm/i915/intel_display.c

15809

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

15816

crtc_state = to_intel_crtc_state(crtc->base.state);

sys/dev/drm/i915/intel_display.c

15818

intel_set_plane_visible(crtc_state, plane_state, visible);

sys/dev/drm/i915/intel_display.c

15822

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_display.c

15825

fixup_active_planes(crtc_state);

sys/dev/drm/i915/intel_display.c

15842

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_display.c

15845

__drm_atomic_helper_crtc_destroy_state(&crtc_state->base);

sys/dev/drm/i915/intel_display.c

15846

memset(crtc_state, 0, sizeof(*crtc_state));

sys/dev/drm/i915/intel_display.c

15847

crtc_state->base.crtc = &crtc->base;

sys/dev/drm/i915/intel_display.c

15849

crtc_state->base.active = crtc_state->base.enable =

sys/dev/drm/i915/intel_display.c

15850

dev_priv->display.get_pipe_config(crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

15852

crtc->base.enabled = crtc_state->base.enable;

sys/dev/drm/i915/intel_display.c

15853

crtc->active = crtc_state->base.active;

sys/dev/drm/i915/intel_display.c

15855

if (crtc_state->base.active)

sys/dev/drm/i915/intel_display.c

15860

enableddisabled(crtc_state->base.active));

sys/dev/drm/i915/intel_display.c

15872

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_display.c

15875

if (crtc_state->base.active &&

sys/dev/drm/i915/intel_display.c

15876

crtc_state->shared_dpll == pll)

sys/dev/drm/i915/intel_display.c

15889

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

15892

crtc_state = to_intel_crtc_state(crtc->base.state);

sys/dev/drm/i915/intel_display.c

15895

encoder->get_config(encoder, crtc_state);

sys/dev/drm/i915/intel_display.c

15938

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_display.c

15943

if (crtc_state->base.active) {

sys/dev/drm/i915/intel_display.c

15944

intel_mode_from_pipe_config(&crtc->base.mode, crtc_state);

sys/dev/drm/i915/intel_display.c

15945

crtc->base.mode.hdisplay = crtc_state->pipe_src_w;

sys/dev/drm/i915/intel_display.c

15946

crtc->base.mode.vdisplay = crtc_state->pipe_src_h;

sys/dev/drm/i915/intel_display.c

15947

intel_mode_from_pipe_config(&crtc_state->base.adjusted_mode, crtc_state);

sys/dev/drm/i915/intel_display.c

15959

crtc_state->base.mode.private_flags = I915_MODE_FLAG_INHERITED;

sys/dev/drm/i915/intel_display.c

15961

intel_crtc_compute_pixel_rate(crtc_state);

sys/dev/drm/i915/intel_display.c

15964

min_cdclk = intel_crtc_compute_min_cdclk(crtc_state);

sys/dev/drm/i915/intel_display.c

15970

&crtc_state->base.adjusted_mode);

sys/dev/drm/i915/intel_display.c

15976

crtc_state->min_voltage_level;

sys/dev/drm/i915/intel_display.c

15978

intel_pipe_config_sanity_check(dev_priv, crtc_state);

sys/dev/drm/i915/intel_display.c

15990

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

160

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_display.c

16002

crtc_state = to_intel_crtc_state(encoder->base.crtc->state);

sys/dev/drm/i915/intel_display.c

16003

get_domains = encoder->get_power_domains(encoder, crtc_state);

sys/dev/drm/i915/intel_display.c

2779

intel_set_plane_visible(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

2788

crtc_state->base.plane_mask |= drm_plane_mask(&plane->base);

sys/dev/drm/i915/intel_display.c

2790

crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base);

sys/dev/drm/i915/intel_display.c

2793

crtc_state->base.crtc->name,

sys/dev/drm/i915/intel_display.c

2794

crtc_state->active_planes);

sys/dev/drm/i915/intel_display.c

2797

static void fixup_active_planes(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

2799

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_display.c

2807

crtc_state->active_planes = 0;

sys/dev/drm/i915/intel_display.c

2810

crtc_state->base.plane_mask)

sys/dev/drm/i915/intel_display.c

2811

crtc_state->active_planes |= BIT(to_intel_plane(plane)->id);

sys/dev/drm/i915/intel_display.c

2817

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_display.c

2822

intel_set_plane_visible(crtc_state, plane_state, false);

sys/dev/drm/i915/intel_display.c

2823

fixup_active_planes(crtc_state);

sys/dev/drm/i915/intel_display.c

3252

static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

3257

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

3361

i9xx_plane_check(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

3371

&crtc_state->base,

sys/dev/drm/i915/intel_display.c

3389

plane_state->ctl = i9xx_plane_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_display.c

3395

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

3422

((crtc_state->pipe_src_h - 1) << 16) |

sys/dev/drm/i915/intel_display.c

3423

(crtc_state->pipe_src_w - 1));

sys/dev/drm/i915/intel_display.c

3427

((crtc_state->pipe_src_h - 1) << 16) |

sys/dev/drm/i915/intel_display.c

3428

(crtc_state->pipe_src_w - 1));

sys/dev/drm/i915/intel_display.c

3687

u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

3729

u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

3762

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

3777

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/i915/intel_display.c

3783

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_display.c

3991

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

4016

temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);

sys/dev/drm/i915/intel_display.c

4092

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

4115

temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);

sys/dev/drm/i915/intel_display.c

4225

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

4267

temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);

sys/dev/drm/i915/intel_display.c

4692

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

4694

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4724

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

4726

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4743

dev_priv->display.fdi_link_train(crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

4753

if (crtc_state->shared_dpll ==

sys/dev/drm/i915/intel_display.c

4778

intel_crtc_has_dp_encoder(crtc_state)) {

sys/dev/drm/i915/intel_display.c

4780

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_display.c

4797

port = intel_get_crtc_new_encoder(state, crtc_state)->port;

sys/dev/drm/i915/intel_display.c

4808

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

4810

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4812

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_display.c

4904

skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,

sys/dev/drm/i915/intel_display.c

4911

&crtc_state->scaler_state;

sys/dev/drm/i915/intel_display.c

4913

to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

4916

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_display.c

4930

if (crtc_state->ycbcr420 && scaler_user == SKL_CRTC_INDEX)

sys/dev/drm/i915/intel_display.c

4939

if (INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&

sys/dev/drm/i915/intel_display.c

5029

static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

5040

ret = skl_update_scaler(crtc_state, force_detach,

sys/dev/drm/i915/intel_display.c

5151

void hsw_enable_ips(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

5153

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

5157

if (!crtc_state->ips_enabled)

sys/dev/drm/i915/intel_display.c

5165

WARN_ON(!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)));

sys/dev/drm/i915/intel_display.c

5191

void hsw_disable_ips(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

5193

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

5197

if (!crtc_state->ips_enabled)

sys/dev/drm/i915/intel_display.c

5337

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

5339

if (!crtc_state->nv12_planes)

sys/dev/drm/i915/intel_display.c

5504

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

5519

encoder->pre_pll_enable(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_display.c

5524

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

5539

encoder->pre_enable(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_display.c

5544

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

5558

encoder->enable(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_display.c

6053

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

6061

enum transcoder transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_display.c

6063

if (!crtc_state->base.active)

sys/dev/drm/i915/intel_display.c

6068

if (crtc_state->pch_pfit.enabled ||

sys/dev/drm/i915/intel_display.c

6069

crtc_state->pch_pfit.force_thru)

sys/dev/drm/i915/intel_display.c

6072

drm_for_each_encoder_mask(encoder, dev, crtc_state->base.encoder_mask) {

sys/dev/drm/i915/intel_display.c

6078

if (HAS_DDI(dev_priv) && crtc_state->has_audio)

sys/dev/drm/i915/intel_display.c

6081

if (crtc_state->shared_dpll)

sys/dev/drm/i915/intel_display.c

6089

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

6098

get_crtc_power_domains(crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

6311

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_display.c

6335

crtc_state = intel_atomic_get_crtc_state(state, intel_crtc);

sys/dev/drm/i915/intel_display.c

6338

WARN_ON(IS_ERR(crtc_state) || ret);

sys/dev/drm/i915/intel_display.c

6340

dev_priv->display.crtc_disable(crtc_state, state);

sys/dev/drm/i915/intel_display.c

6400

static void intel_connector_verify_state(struct drm_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

6412

I915_STATE_WARN(!crtc_state,

sys/dev/drm/i915/intel_display.c

6415

if (!crtc_state)

sys/dev/drm/i915/intel_display.c

6418

I915_STATE_WARN(!crtc_state->active,

sys/dev/drm/i915/intel_display.c

6430

I915_STATE_WARN(crtc_state && crtc_state->active,

sys/dev/drm/i915/intel_display.c

6432

I915_STATE_WARN(!crtc_state && conn_state->best_encoder,

sys/dev/drm/i915/intel_display.c

649

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

6497

static int pipe_required_fdi_lanes(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

6499

if (crtc_state->base.enable && crtc_state->has_pch_encoder)

sys/dev/drm/i915/intel_display.c

6500

return crtc_state->fdi_lanes;

sys/dev/drm/i915/intel_display.c

652

struct drm_device *dev = crtc_state->base.crtc->dev;

sys/dev/drm/i915/intel_display.c

654

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

6623

bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

6625

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

6635

if (crtc_state->pipe_bpp > 24)

sys/dev/drm/i915/intel_display.c

6646

crtc_state->pixel_rate > dev_priv->max_cdclk_freq * 95 / 100)

sys/dev/drm/i915/intel_display.c

6652

static bool hsw_compute_ips_config(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

6655

to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_display.c

6657

to_intel_atomic_state(crtc_state->base.state);

sys/dev/drm/i915/intel_display.c

6659

if (!hsw_crtc_state_ips_capable(crtc_state))

sys/dev/drm/i915/intel_display.c

6662

if (crtc_state->ips_force_disable)

sys/dev/drm/i915/intel_display.c

6666

if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))

sys/dev/drm/i915/intel_display.c

6671

crtc_state->pixel_rate > intel_state->cdclk.logical.cdclk * 95 / 100)

sys/dev/drm/i915/intel_display.c

6721

static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

6723

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_display.c

6727

crtc_state->pixel_rate =

sys/dev/drm/i915/intel_display.c

6728

crtc_state->base.adjusted_mode.crtc_clock;

sys/dev/drm/i915/intel_display.c

6730

crtc_state->pixel_rate =

sys/dev/drm/i915/intel_display.c

6731

ilk_pipe_pixel_rate(crtc_state);

sys/dev/drm/i915/intel_display.c

684

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

6874

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

688

struct drm_device *dev = crtc_state->base.crtc->dev;

sys/dev/drm/i915/intel_display.c

6881

fp = pnv_dpll_compute_fp(&crtc_state->dpll);

sys/dev/drm/i915/intel_display.c

6885

fp = i9xx_dpll_compute_fp(&crtc_state->dpll);

sys/dev/drm/i915/intel_display.c

6890

crtc_state->dpll_hw_state.fp0 = fp;

sys/dev/drm/i915/intel_display.c

6892

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&

sys/dev/drm/i915/intel_display.c

6894

crtc_state->dpll_hw_state.fp1 = fp2;

sys/dev/drm/i915/intel_display.c

6896

crtc_state->dpll_hw_state.fp1 = fp;

sys/dev/drm/i915/intel_display.c

694

clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);

sys/dev/drm/i915/intel_display.c

7293

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

7298

struct dpll *clock = &crtc_state->dpll;

sys/dev/drm/i915/intel_display.c

7300

i9xx_update_pll_dividers(crtc, crtc_state, reduced_clock);

sys/dev/drm/i915/intel_display.c

7304

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS))

sys/dev/drm/i915/intel_display.c

7311

dpll |= (crtc_state->pixel_multiplier - 1)

sys/dev/drm/i915/intel_display.c

7315

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO) ||

sys/dev/drm/i915/intel_display.c

7316

intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))

sys/dev/drm/i915/intel_display.c

7319

if (intel_crtc_has_dp_encoder(crtc_state))

sys/dev/drm/i915/intel_display.c

7347

if (crtc_state->sdvo_tv_clock)

sys/dev/drm/i915/intel_display.c

7349

else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&

sys/dev/drm/i915/intel_display.c

7356

crtc_state->dpll_hw_state.dpll = dpll;

sys/dev/drm/i915/intel_display.c

7359

u32 dpll_md = (crtc_state->pixel_multiplier - 1)

sys/dev/drm/i915/intel_display.c

7361

crtc_state->dpll_hw_state.dpll_md = dpll_md;

sys/dev/drm/i915/intel_display.c

7366

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

7372

struct dpll *clock = &crtc_state->dpll;

sys/dev/drm/i915/intel_display.c

7374

i9xx_update_pll_dividers(crtc, crtc_state, reduced_clock);

sys/dev/drm/i915/intel_display.c

7378

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

7390

intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DVO))

sys/dev/drm/i915/intel_display.c

7393

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&

sys/dev/drm/i915/intel_display.c

7400

crtc_state->dpll_hw_state.dpll = dpll;

sys/dev/drm/i915/intel_display.c

742

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

746

struct drm_device *dev = crtc_state->base.crtc->dev;

sys/dev/drm/i915/intel_display.c

752

clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);

sys/dev/drm/i915/intel_display.c

7607

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

7614

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

7615

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

7617

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

7624

} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DVO)) {

sys/dev/drm/i915/intel_display.c

7630

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

7631

!i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

7632

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

7637

i8xx_compute_dpll(crtc, crtc_state, NULL);

sys/dev/drm/i915/intel_display.c

7643

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

7650

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

7651

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

7653

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

7663

} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) ||

sys/dev/drm/i915/intel_display.c

7664

intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {

sys/dev/drm/i915/intel_display.c

7666

} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) {

sys/dev/drm/i915/intel_display.c

7673

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

7674

!g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

7675

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

7680

i9xx_compute_dpll(crtc, crtc_state, NULL);

sys/dev/drm/i915/intel_display.c

7686

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

7693

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

7694

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

7696

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

7707

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

7708

!pnv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

7709

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

7714

i9xx_compute_dpll(crtc, crtc_state, NULL);

sys/dev/drm/i915/intel_display.c

7720

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

7727

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

7728

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

7730

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

7741

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

7742

!i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

7743

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

7748

i9xx_compute_dpll(crtc, crtc_state, NULL);

sys/dev/drm/i915/intel_display.c

7754

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

7759

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

7760

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

7762

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

7763

!chv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

7764

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

7769

chv_compute_dpll(crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

7775

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

7780

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

7781

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

7783

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

7784

!vlv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

7785

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

7790

vlv_compute_dpll(crtc, crtc_state);

sys/dev/drm/i915/intel_display.c

798

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

802

struct drm_device *dev = crtc_state->base.crtc->dev;

sys/dev/drm/i915/intel_display.c

811

clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);

sys/dev/drm/i915/intel_display.c

8627

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

8638

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

8643

} else if (crtc_state->sdvo_tv_clock)

sys/dev/drm/i915/intel_display.c

8646

fp = i9xx_dpll_compute_fp(&crtc_state->dpll);

sys/dev/drm/i915/intel_display.c

8648

if (ironlake_needs_fb_cb_tune(&crtc_state->dpll, factor))

sys/dev/drm/i915/intel_display.c

8662

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS))

sys/dev/drm/i915/intel_display.c

8667

dpll |= (crtc_state->pixel_multiplier - 1)

sys/dev/drm/i915/intel_display.c

8670

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO) ||

sys/dev/drm/i915/intel_display.c

8671

intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))

sys/dev/drm/i915/intel_display.c

8674

if (intel_crtc_has_dp_encoder(crtc_state))

sys/dev/drm/i915/intel_display.c

8692

intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))

sys/dev/drm/i915/intel_display.c

8696

dpll |= (1 << (crtc_state->dpll.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;

sys/dev/drm/i915/intel_display.c

8698

dpll |= (1 << (crtc_state->dpll.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;

sys/dev/drm/i915/intel_display.c

8700

switch (crtc_state->dpll.p2) {

sys/dev/drm/i915/intel_display.c

8715

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&

sys/dev/drm/i915/intel_display.c

8723

crtc_state->dpll_hw_state.dpll = dpll;

sys/dev/drm/i915/intel_display.c

8724

crtc_state->dpll_hw_state.fp0 = fp;

sys/dev/drm/i915/intel_display.c

8725

crtc_state->dpll_hw_state.fp1 = fp2;

sys/dev/drm/i915/intel_display.c

8729

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

8736

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_display.c

8737

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_display.c

8740

if (!crtc_state->has_pch_encoder)

sys/dev/drm/i915/intel_display.c

8743

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) {

sys/dev/drm/i915/intel_display.c

8765

if (!crtc_state->clock_set &&

sys/dev/drm/i915/intel_display.c

8766

!g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,

sys/dev/drm/i915/intel_display.c

8767

refclk, NULL, &crtc_state->dpll)) {

sys/dev/drm/i915/intel_display.c

8772

ironlake_compute_dpll(crtc, crtc_state, NULL);

sys/dev/drm/i915/intel_display.c

8774

if (!intel_get_shared_dpll(crtc, crtc_state, NULL)) {

sys/dev/drm/i915/intel_display.c

892

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

896

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

9357

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_display.c

9360

to_intel_atomic_state(crtc_state->base.state);

sys/dev/drm/i915/intel_display.c

9362

if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) {

sys/dev/drm/i915/intel_display.c

9364

intel_get_crtc_new_encoder(state, crtc_state);

sys/dev/drm/i915/intel_display.c

9366

if (!intel_get_shared_dpll(crtc, crtc_state, encoder)) {

sys/dev/drm/i915/intel_display.c

952

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

956

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_display.c

9832

static int intel_check_cursor(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

9844

&crtc_state->base,

sys/dev/drm/i915/intel_display.c

9873

static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

9893

static int i845_check_cursor(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_display.c

9899

ret = intel_check_cursor(crtc_state, plane_state);

sys/dev/drm/i915/intel_display.c

9930

plane_state->ctl = i845_cursor_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_display.c

9936

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dp.c

121

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_dp.c

2617

void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dp.c

2627

intel_panel_enable_backlight(crtc_state, conn_state);

sys/dev/drm/i915/intel_dp.c

3301

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dp.c

3305

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dp.c

4370

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_dp.c

4394

crtc_state = to_intel_crtc_state(crtc->base.state);

sys/dev/drm/i915/intel_dp.c

4396

WARN_ON(!intel_crtc_has_dp_encoder(crtc_state));

sys/dev/drm/i915/intel_dp.c

4398

if (!crtc_state->base.active)

sys/dev/drm/i915/intel_dp.c

6056

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dp.c

6062

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dp.c

6098

if (!crtc_state->base.active) {

sys/dev/drm/i915/intel_dp.c

6116

i915_reg_t reg = PIPECONF(crtc_state->cpu_transcoder);

sys/dev/drm/i915/intel_dp.c

6147

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dp.c

6151

if (!crtc_state->has_drrs) {

sys/dev/drm/i915/intel_dp_aux_backlight.c

176

static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dp_mst.c

115

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_dp_mst.c

123

crtc_state = drm_atomic_get_new_crtc_state(state, old_crtc);

sys/dev/drm/i915/intel_dp_mst.c

124

slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu;

sys/dev/drm/i915/intel_dp_mst.c

125

if (drm_atomic_crtc_needs_modeset(crtc_state) && slots > 0) {

sys/dev/drm/i915/intel_dp_mst.c

136

to_intel_crtc_state(crtc_state)->dp_m_n.tu = 0;

sys/dev/drm/i915/intel_dpio_phy.c

1011

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dpio_phy.c

1015

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

1038

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dpio_phy.c

1043

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

735

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpio_phy.c

740

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

780

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dpio_phy.c

784

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

788

intel_dp_unused_lane_mask(crtc_state->lane_count);

sys/dev/drm/i915/intel_dpio_phy.c

804

chv_data_lane_soft_reset(encoder, crtc_state, true);

sys/dev/drm/i915/intel_dpio_phy.c

834

if (crtc_state->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

860

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dpio_phy.c

865

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpio_phy.c

878

if (crtc_state->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

885

for (i = 0; i < crtc_state->lane_count; i++) {

sys/dev/drm/i915/intel_dpio_phy.c

887

if (crtc_state->lane_count == 1)

sys/dev/drm/i915/intel_dpio_phy.c

896

if (crtc_state->port_clock > 270000)

sys/dev/drm/i915/intel_dpio_phy.c

898

else if (crtc_state->port_clock > 135000)

sys/dev/drm/i915/intel_dpio_phy.c

900

else if (crtc_state->port_clock > 67500)

sys/dev/drm/i915/intel_dpio_phy.c

902

else if (crtc_state->port_clock > 33750)

sys/dev/drm/i915/intel_dpio_phy.c

911

if (crtc_state->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

924

if (crtc_state->lane_count > 2) {

sys/dev/drm/i915/intel_dpio_phy.c

934

chv_data_lane_soft_reset(encoder, crtc_state, false);

sys/dev/drm/i915/intel_dpll_mgr.c

1303

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

1330

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_dpll_mgr.c

1331

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_dpll_mgr.c

1333

crtc_state->dpll_hw_state.ctrl1 = ctrl1;

sys/dev/drm/i915/intel_dpll_mgr.c

1334

crtc_state->dpll_hw_state.cfgcr1 = cfgcr1;

sys/dev/drm/i915/intel_dpll_mgr.c

1335

crtc_state->dpll_hw_state.cfgcr2 = cfgcr2;

sys/dev/drm/i915/intel_dpll_mgr.c

1377

skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

1381

int clock = crtc_state->port_clock;

sys/dev/drm/i915/intel_dpll_mgr.c

1387

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {

sys/dev/drm/i915/intel_dpll_mgr.c

1388

bret = skl_ddi_hdmi_pll_dividers(crtc, crtc_state, clock);

sys/dev/drm/i915/intel_dpll_mgr.c

1393

} else if (intel_crtc_has_dp_encoder(crtc_state)) {

sys/dev/drm/i915/intel_dpll_mgr.c

1399

crtc_state->dpll_hw_state = dpll_hw_state;

sys/dev/drm/i915/intel_dpll_mgr.c

1404

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))

sys/dev/drm/i915/intel_dpll_mgr.c

1405

pll = intel_find_shared_dpll(crtc, crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

1409

pll = intel_find_shared_dpll(crtc, crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

1415

intel_reference_shared_dpll(pll, crtc_state);

sys/dev/drm/i915/intel_dpll_mgr.c

1684

struct intel_crtc_state *crtc_state, int clock,

sys/dev/drm/i915/intel_dpll_mgr.c

1694

if (!bxt_find_best_dpll(crtc_state, clock, &best_clock)) {

sys/dev/drm/i915/intel_dpll_mgr.c

1807

struct intel_crtc_state *crtc_state, int clock,

sys/dev/drm/i915/intel_dpll_mgr.c

1812

bxt_ddi_hdmi_pll_dividers(intel_crtc, crtc_state, clock, &clk_div);

sys/dev/drm/i915/intel_dpll_mgr.c

1819

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

1825

int i, clock = crtc_state->port_clock;

sys/dev/drm/i915/intel_dpll_mgr.c

1827

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&

sys/dev/drm/i915/intel_dpll_mgr.c

1828

!bxt_ddi_hdmi_set_dpll_hw_state(crtc, crtc_state, clock,

sys/dev/drm/i915/intel_dpll_mgr.c

1832

if (intel_crtc_has_dp_encoder(crtc_state) &&

sys/dev/drm/i915/intel_dpll_mgr.c

1836

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_dpll_mgr.c

1837

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_dpll_mgr.c

1839

crtc_state->dpll_hw_state = dpll_hw_state;

sys/dev/drm/i915/intel_dpll_mgr.c

1848

intel_reference_shared_dpll(pll, crtc_state);

sys/dev/drm/i915/intel_dpll_mgr.c

1903

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2277

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2298

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_dpll_mgr.c

2299

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_dpll_mgr.c

2301

crtc_state->dpll_hw_state.cfgcr0 = cfgcr0;

sys/dev/drm/i915/intel_dpll_mgr.c

2302

crtc_state->dpll_hw_state.cfgcr1 = cfgcr1;

sys/dev/drm/i915/intel_dpll_mgr.c

2349

cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2353

int clock = crtc_state->port_clock;

sys/dev/drm/i915/intel_dpll_mgr.c

2359

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {

sys/dev/drm/i915/intel_dpll_mgr.c

2360

bret = cnl_ddi_hdmi_pll_dividers(crtc, crtc_state, clock);

sys/dev/drm/i915/intel_dpll_mgr.c

2365

} else if (intel_crtc_has_dp_encoder(crtc_state)) {

sys/dev/drm/i915/intel_dpll_mgr.c

2371

crtc_state->dpll_hw_state = dpll_hw_state;

sys/dev/drm/i915/intel_dpll_mgr.c

2374

crtc_state->output_types);

sys/dev/drm/i915/intel_dpll_mgr.c

2378

pll = intel_find_shared_dpll(crtc, crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2386

intel_reference_shared_dpll(pll, crtc_state);

sys/dev/drm/i915/intel_dpll_mgr.c

244

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2522

static bool icl_calc_dpll_state(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

253

shared_dpll = intel_atomic_get_shared_dpll_state(crtc_state->base.state);

sys/dev/drm/i915/intel_dpll_mgr.c

2533

else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))

sys/dev/drm/i915/intel_dpll_mgr.c

262

if (memcmp(&crtc_state->dpll_hw_state,

sys/dev/drm/i915/intel_dpll_mgr.c

264

sizeof(crtc_state->dpll_hw_state)) == 0) {

sys/dev/drm/i915/intel_dpll_mgr.c

2710

static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2723

bool is_dp = !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI);

sys/dev/drm/i915/intel_dpll_mgr.c

2874

icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

2883

int clock = crtc_state->port_clock;

sys/dev/drm/i915/intel_dpll_mgr.c

2891

ret = icl_calc_dpll_state(crtc_state, encoder, clock,

sys/dev/drm/i915/intel_dpll_mgr.c

290

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dpll_mgr.c

2901

ret = icl_calc_dpll_state(crtc_state, encoder, clock,

sys/dev/drm/i915/intel_dpll_mgr.c

2906

ret = icl_calc_mg_pll_state(crtc_state, encoder, clock,

sys/dev/drm/i915/intel_dpll_mgr.c

2920

crtc_state->dpll_hw_state = pll_state;

sys/dev/drm/i915/intel_dpll_mgr.c

2922

pll = intel_find_shared_dpll(crtc, crtc_state, min, max);

sys/dev/drm/i915/intel_dpll_mgr.c

2928

intel_reference_shared_dpll(pll, crtc_state);

sys/dev/drm/i915/intel_dpll_mgr.c

293

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_dpll_mgr.c

296

shared_dpll = intel_atomic_get_shared_dpll_state(crtc_state->base.state);

sys/dev/drm/i915/intel_dpll_mgr.c

300

crtc_state->dpll_hw_state;

sys/dev/drm/i915/intel_dpll_mgr.c

302

crtc_state->shared_dpll = pll;

sys/dev/drm/i915/intel_dpll_mgr.c

3289

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

3298

return dpll_mgr->get_dpll(crtc, crtc_state, encoder);

sys/dev/drm/i915/intel_dpll_mgr.c

427

ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

443

pll = intel_find_shared_dpll(crtc, crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

452

intel_reference_shared_dpll(pll, crtc_state);

sys/dev/drm/i915/intel_dpll_mgr.c

766

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_dpll_mgr.c

778

crtc_state->dpll_hw_state.wrpll = val;

sys/dev/drm/i915/intel_dpll_mgr.c

780

pll = intel_find_shared_dpll(crtc, crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

820

hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

824

int clock = crtc_state->port_clock;

sys/dev/drm/i915/intel_dpll_mgr.c

826

memset(&crtc_state->dpll_hw_state, 0,

sys/dev/drm/i915/intel_dpll_mgr.c

827

sizeof(crtc_state->dpll_hw_state));

sys/dev/drm/i915/intel_dpll_mgr.c

829

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {

sys/dev/drm/i915/intel_dpll_mgr.c

830

pll = hsw_ddi_hdmi_get_dpll(clock, crtc, crtc_state);

sys/dev/drm/i915/intel_dpll_mgr.c

831

} else if (intel_crtc_has_dp_encoder(crtc_state)) {

sys/dev/drm/i915/intel_dpll_mgr.c

833

} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {

sys/dev/drm/i915/intel_dpll_mgr.c

834

if (WARN_ON(crtc_state->port_clock / 2 != 135000))

sys/dev/drm/i915/intel_dpll_mgr.c

837

crtc_state->dpll_hw_state.spll =

sys/dev/drm/i915/intel_dpll_mgr.c

840

pll = intel_find_shared_dpll(crtc, crtc_state,

sys/dev/drm/i915/intel_dpll_mgr.c

849

intel_reference_shared_dpll(pll, crtc_state);

sys/dev/drm/i915/intel_drv.h

1190

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1195

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1430

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1433

void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1434

void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1435

void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1436

void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1437

void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1443

void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1446

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1455

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1458

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1467

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1478

int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1546

intel_crtc_has_type(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1549

return crtc_state->output_types & (1 << type);

sys/dev/drm/i915/intel_drv.h

1552

intel_crtc_has_dp_encoder(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_drv.h

1554

return crtc_state->output_types &

sys/dev/drm/i915/intel_drv.h

1608

struct drm_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1650

bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock,

sys/dev/drm/i915/intel_drv.h

1655

bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1656

void hsw_enable_ips(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1657

void hsw_disable_ips(const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1662

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1665

int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1666

int skl_max_scale(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1674

u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1676

u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1723

void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1739

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1741

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1841

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1847

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1922

void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

1959

const struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

1973

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

2146

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

2157

int skl_plane_check(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

2190

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_drv.h

2191

crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);

sys/dev/drm/i915/intel_drv.h

2192

if (IS_ERR(crtc_state))

sys/dev/drm/i915/intel_drv.h

2193

return ERR_CAST(crtc_state);

sys/dev/drm/i915/intel_drv.h

2195

return to_intel_crtc_state(crtc_state);

sys/dev/drm/i915/intel_drv.h

2200

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

2209

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

2216

void intel_color_set_csc(struct drm_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

2217

void intel_color_load_luts(struct drm_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

271

struct intel_crtc_state *crtc_state);

sys/dev/drm/i915/intel_drv.h

312

void (*enable)(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

987

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_drv.h

992

int (*check_plane)(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_dsi_dcs_backlight.c

111

static void dcs_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_fbc.c

1035

struct intel_crtc_state *crtc_state;

sys/dev/drm/i915/intel_fbc.c

1044

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

sys/dev/drm/i915/intel_fbc.c

1046

crtc_state->enable_fbc = true;

sys/dev/drm/i915/intel_fbc.c

1070

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_fbc.c

1084

WARN_ON(!crtc_state->enable_fbc);

sys/dev/drm/i915/intel_fbc.c

1090

if (!crtc_state->enable_fbc)

sys/dev/drm/i915/intel_fbc.c

1096

intel_fbc_update_state_cache(crtc, crtc_state, plane_state);

sys/dev/drm/i915/intel_fbc.c

653

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_fbc.c

664

cache->crtc.mode_flags = crtc_state->base.adjusted_mode.flags;

sys/dev/drm/i915/intel_fbc.c

666

cache->crtc.hsw_bdw_pixel_rate = crtc_state->pixel_rate;

sys/dev/drm/i915/intel_fbc.c

844

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_fbc.c

864

intel_fbc_update_state_cache(crtc, crtc_state, plane_state);

sys/dev/drm/i915/intel_hdcp.c

801

struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_hdcp.c

823

crtc_state = drm_atomic_get_new_crtc_state(new_state->state,

sys/dev/drm/i915/intel_hdcp.c

825

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_hdmi.c

1137

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_hdmi.c

1141

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

1143

const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_hdmi.c

1149

if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)

sys/dev/drm/i915/intel_hdmi.c

1156

if (crtc_state->pipe_bpp > 24)

sys/dev/drm/i915/intel_hdmi.c

1161

if (crtc_state->has_hdmi_sink)

sys/dev/drm/i915/intel_hdmi.c

152

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

1592

static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

1596

to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_hdmi.c

1597

struct drm_atomic_state *state = crtc_state->base.state;

sys/dev/drm/i915/intel_hdmi.c

1608

if (crtc_state->pipe_bpp <= 8*3)

sys/dev/drm/i915/intel_hdmi.c

1611

if (!crtc_state->has_hdmi_sink)

sys/dev/drm/i915/intel_hdmi.c

1618

if (crtc_state->output_types != 1 << INTEL_OUTPUT_HDMI)

sys/dev/drm/i915/intel_hdmi.c

1624

if (connector_state->crtc != crtc_state->base.crtc)

sys/dev/drm/i915/intel_hdmi.c

1627

if (crtc_state->ycbcr420) {

sys/dev/drm/i915/intel_hdmi.c

1648

crtc_state->base.adjusted_mode.htotal > 5460)

sys/dev/drm/i915/intel_hdmi.c

207

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

214

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

267

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

274

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

325

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

332

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

384

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

391

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_hdmi.c

447

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

466

intel_dig_port->write_infoframe(encoder, crtc_state, frame->any.type, buffer, len);

sys/dev/drm/i915/intel_hdmi.c

470

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

475

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_hdmi.c

489

if (crtc_state->ycbcr420)

sys/dev/drm/i915/intel_hdmi.c

495

crtc_state->limited_color_range ?

sys/dev/drm/i915/intel_hdmi.c

505

intel_write_infoframe(encoder, crtc_state, &frame);

sys/dev/drm/i915/intel_hdmi.c

509

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_hdmi.c

522

intel_write_infoframe(encoder, crtc_state, &frame);

sys/dev/drm/i915/intel_hdmi.c

527

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

535

&crtc_state->base.adjusted_mode);

sys/dev/drm/i915/intel_hdmi.c

539

intel_write_infoframe(encoder, crtc_state, &frame);

sys/dev/drm/i915/intel_hdmi.c

544

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

599

intel_hdmi_set_avi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

600

intel_hdmi_set_spd_infoframe(encoder, crtc_state);

sys/dev/drm/i915/intel_hdmi.c

601

intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

661

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

665

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

670

reg = HSW_TVIDEO_DIP_GCP(crtc_state->cpu_transcoder);

sys/dev/drm/i915/intel_hdmi.c

683

if (gcp_default_phase_possible(crtc_state->pipe_bpp,

sys/dev/drm/i915/intel_hdmi.c

684

&crtc_state->base.adjusted_mode))

sys/dev/drm/i915/intel_hdmi.c

694

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

698

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

734

if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state))

sys/dev/drm/i915/intel_hdmi.c

740

intel_hdmi_set_avi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

741

intel_hdmi_set_spd_infoframe(encoder, crtc_state);

sys/dev/drm/i915/intel_hdmi.c

742

intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

747

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

751

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

777

if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state))

sys/dev/drm/i915/intel_hdmi.c

783

intel_hdmi_set_avi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

784

intel_hdmi_set_spd_infoframe(encoder, crtc_state);

sys/dev/drm/i915/intel_hdmi.c

785

intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

790

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

795

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_hdmi.c

830

if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state))

sys/dev/drm/i915/intel_hdmi.c

836

intel_hdmi_set_avi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

837

intel_hdmi_set_spd_infoframe(encoder, crtc_state);

sys/dev/drm/i915/intel_hdmi.c

838

intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

843

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_hdmi.c

847

i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);

sys/dev/drm/i915/intel_hdmi.c

851

crtc_state->cpu_transcoder);

sys/dev/drm/i915/intel_hdmi.c

863

if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state))

sys/dev/drm/i915/intel_hdmi.c

869

intel_hdmi_set_avi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_hdmi.c

870

intel_hdmi_set_spd_infoframe(encoder, crtc_state);

sys/dev/drm/i915/intel_hdmi.c

871

intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);

sys/dev/drm/i915/intel_panel.c

1001

static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

1007

enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;

sys/dev/drm/i915/intel_panel.c

1049

static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

1080

static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

1090

void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

1096

enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;

sys/dev/drm/i915/intel_panel.c

1116

panel->backlight.enable(crtc_state, conn_state);

sys/dev/drm/i915/intel_panel.c

801

static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

851

static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

857

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_panel.c

897

static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

936

static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

971

static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_panel.c

977

enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;

sys/dev/drm/i915/intel_pm.c

1090

static uint16_t g4x_compute_wm(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1097

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_pm.c

1104

if (!intel_wm_plane_visible(crtc_state, plane_state))

sys/dev/drm/i915/intel_pm.c

1154

static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1157

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

1161

struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1170

static bool g4x_raw_fbc_wm_set(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1173

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

1180

struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1193

static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1202

if (!intel_wm_plane_visible(crtc_state, plane_state)) {

sys/dev/drm/i915/intel_pm.c

1203

dirty |= g4x_raw_plane_wm_set(crtc_state, 0, plane_id, 0);

sys/dev/drm/i915/intel_pm.c

1205

dirty |= g4x_raw_fbc_wm_set(crtc_state, 0, 0);

sys/dev/drm/i915/intel_pm.c

1210

struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1213

wm = g4x_compute_wm(crtc_state, plane_state, level);

sys/dev/drm/i915/intel_pm.c

1226

wm = ilk_compute_fbc_wm(crtc_state, plane_state,

sys/dev/drm/i915/intel_pm.c

1242

dirty |= g4x_raw_plane_wm_set(crtc_state, level, plane_id, USHRT_MAX);

sys/dev/drm/i915/intel_pm.c

1245

dirty |= g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);

sys/dev/drm/i915/intel_pm.c

1251

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id],

sys/dev/drm/i915/intel_pm.c

1252

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id],

sys/dev/drm/i915/intel_pm.c

1253

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]);

sys/dev/drm/i915/intel_pm.c

1257

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc,

sys/dev/drm/i915/intel_pm.c

1258

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc);

sys/dev/drm/i915/intel_pm.c

1264

static bool g4x_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1267

const struct g4x_pipe_wm *raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1272

static bool g4x_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1275

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

1280

return g4x_raw_plane_wm_is_valid(crtc_state, PLANE_PRIMARY, level) &&

sys/dev/drm/i915/intel_pm.c

1281

g4x_raw_plane_wm_is_valid(crtc_state, PLANE_SPRITE0, level) &&

sys/dev/drm/i915/intel_pm.c

1282

g4x_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);

sys/dev/drm/i915/intel_pm.c

1311

static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

1313

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1315

to_intel_atomic_state(crtc_state->base.state);

sys/dev/drm/i915/intel_pm.c

1316

struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;

sys/dev/drm/i915/intel_pm.c

1317

int num_active_planes = hweight32(crtc_state->active_planes &

sys/dev/drm/i915/intel_pm.c

1334

if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))

sys/dev/drm/i915/intel_pm.c

1342

if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))

sys/dev/drm/i915/intel_pm.c

1345

raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1351

if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))

sys/dev/drm/i915/intel_pm.c

1354

raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1363

if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))

sys/dev/drm/i915/intel_pm.c

1366

raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

1543

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

1545

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

1546

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1549

crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate;

sys/dev/drm/i915/intel_pm.c

1555

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

1557

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

1558

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1560

if (!crtc_state->wm.need_postvbl_update)

sys/dev/drm/i915/intel_pm.c

1564

intel_crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;

sys/dev/drm/i915/intel_pm.c

1600

static uint16_t vlv_compute_wm_level(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1607

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_pm.c

1613

if (!intel_wm_plane_visible(crtc_state, plane_state))

sys/dev/drm/i915/intel_pm.c

1619

width = crtc_state->pipe_src_w;

sys/dev/drm/i915/intel_pm.c

1643

static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

1645

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1647

&crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2];

sys/dev/drm/i915/intel_pm.c

1648

struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

1649

unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);

sys/dev/drm/i915/intel_pm.c

1754

static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1757

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

1762

struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

sys/dev/drm/i915/intel_pm.c

1771

static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1780

if (!intel_wm_plane_visible(crtc_state, plane_state)) {

sys/dev/drm/i915/intel_pm.c

1781

dirty |= vlv_raw_plane_wm_set(crtc_state, 0, plane_id, 0);

sys/dev/drm/i915/intel_pm.c

1786

struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

sys/dev/drm/i915/intel_pm.c

1787

int wm = vlv_compute_wm_level(crtc_state, plane_state, level);

sys/dev/drm/i915/intel_pm.c

1798

dirty |= vlv_raw_plane_wm_set(crtc_state, level, plane_id, USHRT_MAX);

sys/dev/drm/i915/intel_pm.c

1804

crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id],

sys/dev/drm/i915/intel_pm.c

1805

crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id],

sys/dev/drm/i915/intel_pm.c

1806

crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]);

sys/dev/drm/i915/intel_pm.c

1811

static bool vlv_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

1815

&crtc_state->wm.vlv.raw[level];

sys/dev/drm/i915/intel_pm.c

1817

&crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

1822

static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state, int level)

sys/dev/drm/i915/intel_pm.c

1824

return vlv_raw_plane_wm_is_valid(crtc_state, PLANE_PRIMARY, level) &&

sys/dev/drm/i915/intel_pm.c

1825

vlv_raw_plane_wm_is_valid(crtc_state, PLANE_SPRITE0, level) &&

sys/dev/drm/i915/intel_pm.c

1826

vlv_raw_plane_wm_is_valid(crtc_state, PLANE_SPRITE1, level) &&

sys/dev/drm/i915/intel_pm.c

1827

vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);

sys/dev/drm/i915/intel_pm.c

1830

static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

1832

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1835

to_intel_atomic_state(crtc_state->base.state);

sys/dev/drm/i915/intel_pm.c

1836

struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;

sys/dev/drm/i915/intel_pm.c

1838

&crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

1839

int num_active_planes = hweight32(crtc_state->active_planes &

sys/dev/drm/i915/intel_pm.c

1841

bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->base);

sys/dev/drm/i915/intel_pm.c

1856

if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))

sys/dev/drm/i915/intel_pm.c

1867

crtc_state->fifo_changed = true;

sys/dev/drm/i915/intel_pm.c

1879

ret = vlv_compute_fifo(crtc_state);

sys/dev/drm/i915/intel_pm.c

1886

crtc_state->fifo_changed = true;

sys/dev/drm/i915/intel_pm.c

1899

const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

sys/dev/drm/i915/intel_pm.c

1902

if (!vlv_raw_crtc_wm_is_valid(crtc_state, level))

sys/dev/drm/i915/intel_pm.c

1938

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

1940

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

1943

&crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

1946

if (!crtc_state->fifo_changed)

sys/dev/drm/i915/intel_pm.c

2162

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

2164

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

2165

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

2168

crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate;

sys/dev/drm/i915/intel_pm.c

2174

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

2176

struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

sys/dev/drm/i915/intel_pm.c

2177

struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

2179

if (!crtc_state->wm.need_postvbl_update)

sys/dev/drm/i915/intel_pm.c

2183

intel_crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;

sys/dev/drm/i915/intel_pm.c

3864

const struct drm_crtc_state *crtc_state;

sys/dev/drm/i915/intel_pm.c

3908

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

sys/dev/drm/i915/intel_pm.c

3913

if (!crtc_state->enable)

sys/dev/drm/i915/intel_pm.c

3917

adjusted_mode = &crtc_state->adjusted_mode;

sys/dev/drm/i915/intel_pm.c

4087

skl_pipe_downscale_amount(const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

4091

if (!crtc_state->base.enable)

sys/dev/drm/i915/intel_pm.c

4094

if (crtc_state->pch_pfit.enabled) {

sys/dev/drm/i915/intel_pm.c

4096

uint32_t pfit_size = crtc_state->pch_pfit.size;

sys/dev/drm/i915/intel_pm.c

4100

src_w = crtc_state->pipe_src_w;

sys/dev/drm/i915/intel_pm.c

4101

src_h = crtc_state->pipe_src_h;

sys/dev/drm/i915/intel_pm.c

4123

struct drm_crtc_state *crtc_state = &cstate->base;

sys/dev/drm/i915/intel_pm.c

4124

struct drm_atomic_state *state = crtc_state->state;

sys/dev/drm/i915/intel_pm.c

4136

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {

sys/dev/drm/i915/intel_pm.c

4162

crtc_clock = crtc_state->adjusted_mode.crtc_clock;

sys/dev/drm/i915/intel_pm.c

472

static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_pm.c

474

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_pm.c

476

struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

4951

struct drm_crtc_state *crtc_state = &cstate->base;

sys/dev/drm/i915/intel_pm.c

4964

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {

sys/dev/drm/i915/intel_pm.c

5786

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_pm.c

5814

raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

5821

raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

5830

raw = &crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

5838

g4x_raw_plane_wm_set(crtc_state, level,

sys/dev/drm/i915/intel_pm.c

5840

g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);

sys/dev/drm/i915/intel_pm.c

5842

crtc_state->wm.g4x.optimal = *active;

sys/dev/drm/i915/intel_pm.c

5843

crtc_state->wm.g4x.intermediate = *active;

sys/dev/drm/i915/intel_pm.c

5870

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_pm.c

5874

struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;

sys/dev/drm/i915/intel_pm.c

5883

&crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

5892

&crtc_state->wm.g4x.raw[level];

sys/dev/drm/i915/intel_pm.c

5903

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_pm.c

5906

crtc_state->wm.g4x.intermediate =

sys/dev/drm/i915/intel_pm.c

5907

crtc_state->wm.g4x.optimal;

sys/dev/drm/i915/intel_pm.c

5908

crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;

sys/dev/drm/i915/intel_pm.c

5963

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_pm.c

5967

&crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

5972

vlv_get_fifo_size(crtc_state);

sys/dev/drm/i915/intel_pm.c

5979

&crtc_state->wm.vlv.raw[level];

sys/dev/drm/i915/intel_pm.c

5995

vlv_raw_plane_wm_set(crtc_state, level,

sys/dev/drm/i915/intel_pm.c

5999

crtc_state->wm.vlv.optimal = *active;

sys/dev/drm/i915/intel_pm.c

6000

crtc_state->wm.vlv.intermediate = *active;

sys/dev/drm/i915/intel_pm.c

6024

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_pm.c

6028

struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;

sys/dev/drm/i915/intel_pm.c

6030

&crtc_state->wm.vlv.fifo_state;

sys/dev/drm/i915/intel_pm.c

6039

&crtc_state->wm.vlv.raw[level];

sys/dev/drm/i915/intel_pm.c

6050

struct intel_crtc_state *crtc_state =

sys/dev/drm/i915/intel_pm.c

6053

crtc_state->wm.vlv.intermediate =

sys/dev/drm/i915/intel_pm.c

6054

crtc_state->wm.vlv.optimal;

sys/dev/drm/i915/intel_pm.c

6055

crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;

sys/dev/drm/i915/intel_pm.c

802

static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_pm.c

808

if (!crtc_state->base.active)

sys/dev/drm/i915/intel_psr.c

270

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

297

intel_dig_port->write_infoframe(&intel_dig_port->base.base, crtc_state,

sys/dev/drm/i915/intel_psr.c

446

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

449

int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;

sys/dev/drm/i915/intel_psr.c

450

int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;

sys/dev/drm/i915/intel_psr.c

480

struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

485

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_psr.c

507

I915_READ(HSW_STEREO_3D_CTL(crtc_state->cpu_transcoder)) &

sys/dev/drm/i915/intel_psr.c

533

crtc_state->has_psr = true;

sys/dev/drm/i915/intel_psr.c

534

crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);

sys/dev/drm/i915/intel_psr.c

557

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

560

enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

sys/dev/drm/i915/intel_psr.c

603

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

612

intel_psr_setup_vsc(intel_dp, crtc_state);

sys/dev/drm/i915/intel_psr.c

614

intel_psr_enable_source(intel_dp, crtc_state);

sys/dev/drm/i915/intel_psr.c

628

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

632

if (!crtc_state->has_psr)

sys/dev/drm/i915/intel_psr.c

646

dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state);

sys/dev/drm/i915/intel_psr.c

651

intel_psr_enable_locked(dev_priv, crtc_state);

sys/dev/drm/i915/intel_psr.c

72

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/intel_psr.c

78

return crtc_state->has_psr2;

sys/dev/drm/i915/intel_psr.c

814

struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_psr.c

818

if (!crtc_state || !crtc_state->has_psr2)

sys/dev/drm/i915/intel_psr.c

836

struct intel_crtc_state *crtc_state = NULL;

sys/dev/drm/i915/intel_psr.c

863

crtc_state = to_intel_crtc_state(crtc->state);

sys/dev/drm/i915/intel_psr.c

864

commit = crtc_state->base.commit;

sys/dev/drm/i915/intel_psr.c

880

if (!enable || switching_psr(dev_priv, crtc_state, mode))

sys/dev/drm/i915/intel_psr.c

885

dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state);

sys/dev/drm/i915/intel_psr.c

890

intel_psr_enable_locked(dev_priv, crtc_state);

sys/dev/drm/i915/intel_sdvo.c

1265

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sdvo.c

1269

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/i915/intel_sdvo.c

1270

const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_sdvo.c

1275

const struct drm_display_mode *mode = &crtc_state->base.mode;

sys/dev/drm/i915/intel_sdvo.c

1317

if (crtc_state->has_hdmi_sink) {

sys/dev/drm/i915/intel_sdvo.c

1321

intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);

sys/dev/drm/i915/intel_sdvo.c

1337

switch (crtc_state->pixel_multiplier) {

sys/dev/drm/i915/intel_sdvo.c

1353

if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)

sys/dev/drm/i915/intel_sdvo.c

1371

if (crtc_state->has_audio) {

sys/dev/drm/i915/intel_sdvo.c

1382

sdvox |= (crtc_state->pixel_multiplier - 1)

sys/dev/drm/i915/intel_sdvo.c

2143

struct drm_crtc_state *crtc_state =

sys/dev/drm/i915/intel_sdvo.c

2146

crtc_state->connectors_changed = true;

sys/dev/drm/i915/intel_sdvo.c

2252

struct drm_crtc_state *crtc_state =

sys/dev/drm/i915/intel_sdvo.c

2256

crtc_state->connectors_changed = true;

sys/dev/drm/i915/intel_sprite.c

1058

g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

1066

&crtc_state->base.adjusted_mode;

sys/dev/drm/i915/intel_sprite.c

1119

g4x_sprite_check(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

1139

&crtc_state->base,

sys/dev/drm/i915/intel_sprite.c

1152

ret = g4x_sprite_check_scaling(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1161

plane_state->ctl = ivb_sprite_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1163

plane_state->ctl = g4x_sprite_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1186

vlv_sprite_check(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

1196

&crtc_state->base,

sys/dev/drm/i915/intel_sprite.c

1214

plane_state->ctl = vlv_sprite_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1219

static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

1267

if (crtc_state->base.enable &&

sys/dev/drm/i915/intel_sprite.c

1268

crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE &&

sys/dev/drm/i915/intel_sprite.c

1280

static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

1287

int pipe_src_w = crtc_state->pipe_src_w;

sys/dev/drm/i915/intel_sprite.c

1310

int skl_plane_check(struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

1318

ret = skl_plane_check_fb(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1327

max_scale = skl_max_scale(crtc_state,

sys/dev/drm/i915/intel_sprite.c

1335

&crtc_state->base,

sys/dev/drm/i915/intel_sprite.c

1344

ret = skl_plane_check_dst_coordinates(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1356

plane_state->ctl = skl_plane_ctl(crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

1359

plane_state->color_ctl = glk_plane_color_ctl(crtc_state,

sys/dev/drm/i915/intel_sprite.c

307

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

314

&crtc_state->scaler_state.scalers[scaler_id];

sys/dev/drm/i915/intel_sprite.c

360

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

405

skl_program_scaler(plane, crtc_state, plane_state);

sys/dev/drm/i915/intel_sprite.c

558

static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

627

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

724

static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

788

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

899

static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/intel_sprite.c

960

const struct intel_crtc_state *crtc_state,

sys/dev/drm/i915/vlv_dsi.c

673

const struct intel_crtc_state *crtc_state)

sys/dev/drm/i915/vlv_dsi.c

676

struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

sys/dev/drm/include/drm/drm_atomic_helper.h

217

#define drm_atomic_crtc_state_for_each_plane(plane, crtc_state) \

sys/dev/drm/include/drm/drm_atomic_helper.h

218

drm_for_each_plane_mask(plane, (crtc_state)->state->dev, (crtc_state)->plane_mask)

sys/dev/drm/include/drm/drm_atomic_helper.h

235

#define drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) \

sys/dev/drm/include/drm/drm_atomic_helper.h

236

drm_for_each_plane_mask(plane, (crtc_state)->state->dev, (crtc_state)->plane_mask) \

sys/dev/drm/include/drm/drm_atomic_helper.h

238

__drm_atomic_get_current_plane_state((crtc_state)->state, \

sys/dev/drm/include/drm/drm_atomic_helper.h

43

const struct drm_crtc_state *crtc_state,

sys/dev/drm/include/drm/drm_modeset_helper_vtables.h

639

struct drm_crtc_state *crtc_state,

sys/dev/drm/include/drm/drm_modeset_helper_vtables.h

761

struct drm_crtc_state *crtc_state,

sys/dev/drm/include/drm/drm_simple_kms_helper.h

67

struct drm_crtc_state *crtc_state,

sys/dev/drm/include/drm/drm_simple_kms_helper.h

97

struct drm_crtc_state *crtc_state);