sys/dev/drm/amd/amdgpu/amdgpu_acp.c

356

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

363

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

374

val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

381

val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

391

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

418

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

425

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

436

val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

443

val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);

sys/dev/drm/amd/display/dc/dm_services.h

72

value = cgs_read_register(ctx->cgs_device, address);

sys/dev/drm/amd/include/cgs_common.h

132

cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1161

(cgs_read_register(hwmgr->device, 0x1488) & ~0x1));

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

140

hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3484

tmp = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3522

sclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3528

mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4223

tmp = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4253

cgs_read_register(hwmgr->device, mmDLL_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4255

cgs_read_register(hwmgr->device, mmMCLK_PWRMGT_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4257

cgs_read_register(hwmgr->device, mmMPLL_AD_FUNC_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4259

cgs_read_register(hwmgr->device, mmMPLL_DQ_FUNC_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4261

cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4263

cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL_1);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4265

cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL_2);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4267

cgs_read_register(hwmgr->device, mmMPLL_SS1);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4269

cgs_read_register(hwmgr->device, mmMPLL_SS2);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4419

clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4435

clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

455

mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

456

mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

460

mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

461

mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

483

mc_cg_config = cgs_read_register(hwmgr->device, mmMC_CG_CONFIG);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

922

data = cgs_read_register(hwmgr->device, config_regs->offset);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

973

value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1763

activity_percent = cgs_read_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

118

cur_value = cgs_read_register(hwmgr->device, index);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

162

cur_value = cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

139

PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

151

cgs_read_register(device, mm##reg), reg, field, fieldval))

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

844

data = cgs_read_register(hwmgr->device, config_regs->offset);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1260

((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1261

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1263

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1269

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

150

original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1637

dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1638

dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

204

*value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2440

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2592

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2604

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2632

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2685

cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2686

cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2687

cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2688

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2689

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2690

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2691

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2692

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2693

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2694

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2695

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2696

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2697

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2698

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2699

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2700

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2701

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2702

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2703

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2704

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1512

dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1513

dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1514

burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2077

table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2523

cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2525

cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2527

cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2529

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2531

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2533

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2535

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1308

((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1309

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1311

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1317

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1600

dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1601

dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2370

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2522

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2534

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2563

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2615

cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2616

cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2617

cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2618

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2619

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2620

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2621

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2622

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2623

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2624

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2625

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2626

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2627

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2628

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2629

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2630

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2631

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2632

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2633

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2634

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1349

dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1350

dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1918

table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A)

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

125

original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

286

*value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

164

(cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA) & firmware))

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

196

tmp = cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

202

tmp = cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

60

return cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

739

hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

75

uint32_t val = cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1047

((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) {

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1048

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1050

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1059

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1475

dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1476

dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2401

(0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2830

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2984

temp_reg = cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2997

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3024

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3078

cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3080

cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3082

cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3084

cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3086

cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3088

cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3090

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3092

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3094

cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3096

cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3098

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3100

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3102

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3104

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3106

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3108

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3110

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3112

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3114

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3116

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1272

dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1273

dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1274

burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1275

rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1276

misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

2093

(0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &