sys/bus/gpio/gpio_intel/gpio_cherryview.c

167

val = bus_read_4(sc->mem_res, offset);

sys/bus/pci/pci.c

1449

val = bus_read_4(msix->msix_table_res, offset);

sys/bus/pci/pci.c

1465

val = bus_read_4(msix->msix_table_res, offset);

sys/bus/pci/pci.c

1485

return (bus_read_4(msix->msix_pba_res, offset) & bit);

sys/bus/pci/pci.c

2833

ctl = bus_read_4(res, OHCI_CONTROL);

sys/bus/pci/pci.c

2841

ctl = bus_read_4(res, OHCI_CONTROL);

sys/bus/pci/pci.c

2898

cparams = bus_read_4(res, EHCI_HCCPARAMS);

sys/bus/pci/pci.c

2930

offs = EHCI_CAPLENGTH(bus_read_4(res, EHCI_CAPLEN_HCIVERSION));

sys/bus/pci/pci.c

2954

cparams = bus_read_4(res, XHCI_HCSPARAMS0);

sys/bus/pci/pci.c

2961

eec = bus_read_4(res, eecp);

sys/bus/pci/pci.c

3007

bus_read_4(res, offs + XHCI_USBSTS);

sys/dev/agp/intel-gtt.c

1097

bus_read_4(sc->sc_res[1], index * 4);

sys/dev/agp/intel-gtt.c

1106

bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));

sys/dev/agp/intel-gtt.c

1115

bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));

sys/dev/agp/intel-gtt.c

542

bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));

sys/dev/agp/intel-gtt.c

555

bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));

sys/dev/agp/intel-gtt.c

583

switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &

sys/dev/agp/intel-gtt.c

734

pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);

sys/dev/agp/intel-gtt.c

771

pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);

sys/dev/agp/intel-gtt.c

776

pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);

sys/dev/agp/intel-gtt.c

823

pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);

sys/dev/agp/intel-gtt.c

903

pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);

sys/dev/crypto/tpm/tpm20.h

149

return (bus_read_4(sc->mem_res, off));

sys/dev/disk/sdhci/sdhci_acpi.c

112

return bus_read_4(sc->mem_res, off);

sys/dev/disk/sdhci/sdhci_pci.c

209

return bus_read_4(sc->mem_res[slot->num], off);

sys/dev/disk/sym/sym_hipd.c

870

#define INL_OFF(o) bus_read_4(np->io_res, (o))

sys/dev/disk/sym/sym_hipd.c

880

#define INL_OFF(o) bus_read_4(np->mmio_res, (o))

sys/dev/drm/amd/amdgpu/amdgpu_device.c

240

return bus_read_4(adev->rio_mem, (reg * 4));

sys/dev/drm/amd/amdgpu/amdgpu_device.c

243

return bus_read_4(adev->rio_mem, (mmMM_DATA * 4));

sys/dev/misc/amdsbwd/amdsbwd.c

146

return (bus_read_4(sc->res_ctrl, 0));

sys/dev/misc/amdsbwd/amdsbwd.c

158

return (bus_read_4(sc->res_count, 0));

sys/dev/misc/ichwd/ichwd.c

241

bus_read_4((sc)->tco_res, (off))

sys/dev/misc/ichwd/ichwd.c

243

bus_read_4((sc)->smi_res, (off))

sys/dev/misc/ichwd/ichwd.c

245

bus_read_4((sc)->gcs_res, (off))

sys/dev/netif/bge/if_bgevar.h

91

bus_read_4(sc->bge_res2, reg)

sys/dev/netif/bnx/if_bnxvar.h

91

bus_read_4(sc->bnx_res2, reg)

sys/dev/raid/twe/twe_compat.h

60

#define TWE_STATUS(sc) (u_int32_t)bus_read_4((sc)->twe_io, 0x4)

sys/dev/raid/twe/twe_compat.h

62

#define TWE_RESPONSE_QUEUE(sc) bus_read_4((sc)->twe_io, 0xc)

sys/dev/virtual/virtio/mmio/virtio_mmio.c

120

#define vtmmio_read_config_4(sc, o) bus_read_4((sc)->res[0], (o))

sys/dev/virtual/virtio/pci/virtio_pci.c

161

#define vtpci_read_config_4(sc, o) bus_read_4((sc)->vtpci_res, (o))

sys/dev/virtual/vmware/pvscsi/pvscsi.c

262

return (bus_read_4(sc->mm_res, offset));