sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1145

static const struct audio_clock_info audio_clock_info_table[16] = {

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1164

static const struct audio_clock_info audio_clock_info_table_36bpc[14] = {

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1181

static const struct audio_clock_info audio_clock_info_table_48bpc[14] = {

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1259

struct audio_clock_info *audio_clock_info)

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1261

const struct audio_clock_info *clock_info;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1293

*audio_clock_info = clock_info[index];

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1305

audio_clock_info->pixel_clock_in_10khz =

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1307

audio_clock_info->cts_32khz = actual_pixel_clock_in_khz;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1308

audio_clock_info->cts_44khz = actual_pixel_clock_in_khz;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1309

audio_clock_info->cts_48khz = actual_pixel_clock_in_khz;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1311

audio_clock_info->n_32khz = 4096;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1312

audio_clock_info->n_44khz = 6272;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1313

audio_clock_info->n_48khz = 6144;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1347

struct audio_clock_info audio_clock_info = {0};

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1377

&audio_clock_info);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1385

REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1388

REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1391

REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1394

REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1397

REG_UPDATE(HDMI_ACR_48_0, HDMI_ACR_CTS_48, audio_clock_info.cts_48khz);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1400

REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1005

static const struct audio_clock_info audio_clock_info_table[16] = {

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1024

static const struct audio_clock_info audio_clock_info_table_36bpc[14] = {

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1041

static const struct audio_clock_info audio_clock_info_table_48bpc[14] = {

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1098

struct audio_clock_info *audio_clock_info)

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1100

const struct audio_clock_info *clock_info;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1132

*audio_clock_info = clock_info[index];

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1144

audio_clock_info->pixel_clock_in_10khz =

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1146

audio_clock_info->cts_32khz = actual_pixel_clock_in_khz;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1147

audio_clock_info->cts_44khz = actual_pixel_clock_in_khz;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1148

audio_clock_info->cts_48khz = actual_pixel_clock_in_khz;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1150

audio_clock_info->n_32khz = 4096;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1151

audio_clock_info->n_44khz = 6272;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1152

audio_clock_info->n_48khz = 6144;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1186

struct audio_clock_info audio_clock_info = {0};

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1210

&audio_clock_info);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1218

REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1221

REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1224

REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1227

REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1230

REG_UPDATE(HDMI_ACR_48_0, HDMI_ACR_CTS_48, audio_clock_info.cts_48khz);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1233

REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);