sys/dev/netif/msk/if_mskreg.h

1952

#define GMF_RX_OVER_ON BIT_19 /* enable flushing on receive overrun */

sys/dev/netif/msk/if_mskreg.h

2079

#define GPC_ANEG_0 BIT_19 /* ANEG[0] */

sys/dev/netif/msk/if_mskreg.h

356

#define PCI_REL_PCIE_EXIT_L1_ST BIT_19 /* PCIe Exit L1 State */

sys/dev/netif/msk/if_mskreg.h

381

#define PCI_CF1_GAT_PCIE_RX_IDLE BIT_19 /* PCI-E Rx Electrical idle */

sys/dev/netif/re/re.c

9039

CSR_WRITE_4(sc, RE_TXCFG, (CSR_READ_4(sc, RE_TXCFG) & ~BIT_19) | BIT_25);

sys/dev/netif/re/re.c

9046

CSR_WRITE_4(sc, RE_TXCFG, (CSR_READ_4(sc, RE_TXCFG) & ~BIT_19) | RE_TXCFG_IFG);

sys/dev/netif/re/re.c

9059

CSR_WRITE_4(sc, RE_TXCFG, (CSR_READ_4(sc, RE_TXCFG) | (BIT_24 | BIT_25)) & ~BIT_19);

sys/dev/netif/re/re.c

9061

CSR_WRITE_4(sc, RE_TXCFG, (CSR_READ_4(sc, RE_TXCFG) | BIT_25) & ~(BIT_19 | BIT_24));