sys/dev/drm/i915/i915_reg.h

185

#define _MASKED_BIT_ENABLE(a) ({ typeof(a) _a = (a); _MASKED_FIELD(_a, _a); })

sys/dev/drm/i915/i915_reg.h

186

#define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0))

sys/dev/drm/i915/intel_guc_submission.c

1227

irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_NEVER);

sys/dev/drm/i915/intel_lrc.c

2461

_MASKED_FIELD(GEN8_CSB_WRITE_PTR_MASK,

sys/dev/drm/i915/intel_pm.c

8643

_MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));

sys/dev/drm/i915/intel_pm.c

8969

_MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));

sys/dev/drm/i915/intel_pm.c

9063

_MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));

sys/dev/drm/i915/intel_pm.c

9140

_MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));

sys/dev/drm/i915/intel_workarounds.c

125

WA_REG(addr, (mask), _MASKED_FIELD(mask, value))