sys/bus/u4b/controller/xhci.c

1148

XWRITE4(sc, runt, XHCI_ERDP_LO(0), (uint32_t)addr);

sys/bus/u4b/controller/xhci.c

1149

XWRITE4(sc, runt, XHCI_ERDP_HI(0), (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

1235

XWRITE4(sc, door, XHCI_DOORBELL(0), 0);

sys/bus/u4b/controller/xhci.c

1657

XWRITE4(sc, oper, XHCI_USBSTS, status);

sys/bus/u4b/controller/xhci.c

1665

XWRITE4(sc, runt, XHCI_IMAN(0), temp);

sys/bus/u4b/controller/xhci.c

2869

XWRITE4(sc, door, XHCI_DOORBELL(index),

sys/bus/u4b/controller/xhci.c

307

XWRITE4(sc, oper, XHCI_CRCR_LO, temp | XHCI_CRCR_LO_CS);

sys/bus/u4b/controller/xhci.c

308

XWRITE4(sc, oper, XHCI_CRCR_HI, 0);

sys/bus/u4b/controller/xhci.c

310

XWRITE4(sc, oper, XHCI_CRCR_LO, temp | XHCI_CRCR_LO_CA);

sys/bus/u4b/controller/xhci.c

311

XWRITE4(sc, oper, XHCI_CRCR_HI, 0);

sys/bus/u4b/controller/xhci.c

342

XWRITE4(sc, oper, XHCI_CRCR_LO, ((uint32_t)addr) | XHCI_CRCR_LO_RCS);

sys/bus/u4b/controller/xhci.c

343

XWRITE4(sc, oper, XHCI_CRCR_HI, (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

3456

XWRITE4(sc, oper, port, v | XHCI_PS_WRC);

sys/bus/u4b/controller/xhci.c

3459

XWRITE4(sc, oper, port, v | XHCI_PS_CEC);

sys/bus/u4b/controller/xhci.c

3463

XWRITE4(sc, oper, port, v | XHCI_PS_PLC);

sys/bus/u4b/controller/xhci.c

3466

XWRITE4(sc, oper, port, v | XHCI_PS_CSC);

sys/bus/u4b/controller/xhci.c

3469

XWRITE4(sc, oper, port, v | XHCI_PS_PEC);

sys/bus/u4b/controller/xhci.c

3472

XWRITE4(sc, oper, port, v | XHCI_PS_OCC);

sys/bus/u4b/controller/xhci.c

3475

XWRITE4(sc, oper, port, v | XHCI_PS_PRC);

sys/bus/u4b/controller/xhci.c

3478

XWRITE4(sc, oper, port, v | XHCI_PS_PED);

sys/bus/u4b/controller/xhci.c

3481

XWRITE4(sc, oper, port, v & ~XHCI_PS_PP);

sys/bus/u4b/controller/xhci.c

3484

XWRITE4(sc, oper, port, v & ~XHCI_PS_PIC_SET(3));

sys/bus/u4b/controller/xhci.c

3490

XWRITE4(sc, oper, port, v |

sys/bus/u4b/controller/xhci.c

3498

XWRITE4(sc, oper, port, v |

sys/bus/u4b/controller/xhci.c

3648

XWRITE4(sc, oper, port, v);

sys/bus/u4b/controller/xhci.c

3659

XWRITE4(sc, oper, port, v);

sys/bus/u4b/controller/xhci.c

366

XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_HCRST);

sys/bus/u4b/controller/xhci.c

3662

XWRITE4(sc, oper, port, v | XHCI_PS_WPR);

sys/bus/u4b/controller/xhci.c

3665

XWRITE4(sc, oper, port, v |

sys/bus/u4b/controller/xhci.c

3681

XWRITE4(sc, oper, port, v |

sys/bus/u4b/controller/xhci.c

3686

XWRITE4(sc, oper, port, v | XHCI_PS_PR);

sys/bus/u4b/controller/xhci.c

3690

XWRITE4(sc, oper, port, v | XHCI_PS_PP);

sys/bus/u4b/controller/xhci.c

3701

XWRITE4(sc, oper, port, v);

sys/bus/u4b/controller/xhci.c

409

XWRITE4(sc, oper, XHCI_CONFIG, sc->sc_noslot);

sys/bus/u4b/controller/xhci.c

4313

XWRITE4(sc, door, XHCI_DOORBELL(index),

sys/bus/u4b/controller/xhci.c

433

XWRITE4(sc, oper, XHCI_USBSTS, temp);

sys/bus/u4b/controller/xhci.c

435

XWRITE4(sc, oper, XHCI_DNCTRL, 0);

sys/bus/u4b/controller/xhci.c

456

XWRITE4(sc, oper, XHCI_DCBAAP_LO, (uint32_t)addr);

sys/bus/u4b/controller/xhci.c

457

XWRITE4(sc, oper, XHCI_DCBAAP_HI, (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

458

XWRITE4(sc, oper, XHCI_DCBAAP_LO, (uint32_t)addr);

sys/bus/u4b/controller/xhci.c

459

XWRITE4(sc, oper, XHCI_DCBAAP_HI, (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

477

XWRITE4(sc, runt, XHCI_ERSTSZ(0), XHCI_ERSTS_SET(temp));

sys/bus/u4b/controller/xhci.c

484

XWRITE4(sc, runt, XHCI_IMOD(0), sc->sc_imod_default);

sys/bus/u4b/controller/xhci.c

513

XWRITE4(sc, runt, XHCI_ERDP_LO(0), (uint32_t)addr);

sys/bus/u4b/controller/xhci.c

514

XWRITE4(sc, runt, XHCI_ERDP_HI(0), (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

520

XWRITE4(sc, runt, XHCI_ERSTBA_LO(0), (uint32_t)addr);

sys/bus/u4b/controller/xhci.c

521

XWRITE4(sc, runt, XHCI_ERSTBA_HI(0), (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

528

XWRITE4(sc, runt, XHCI_IMAN(0), temp);

sys/bus/u4b/controller/xhci.c

537

XWRITE4(sc, oper, XHCI_CRCR_LO, ((uint32_t)addr) | XHCI_CRCR_LO_RCS);

sys/bus/u4b/controller/xhci.c

538

XWRITE4(sc, oper, XHCI_CRCR_HI, (uint32_t)(addr >> 32));

sys/bus/u4b/controller/xhci.c

545

XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_RS |

sys/bus/u4b/controller/xhci.c

555

XWRITE4(sc, oper, XHCI_USBCMD, 0);

sys/bus/u4b/controller/xhci.c

585

XWRITE4(sc, oper, XHCI_USBCMD, 0);